将整数转换为 std_logic [英] convert integer to std_logic

问题描述

假设你有一个循环

for i in 1 downto 0 loop
    for j in 1 downto 0 loop
        tS0 <= i;

但我需要将整数(这是自然的)转换为 std_logic.tS0 被声明为 std_logic.我只做一点(0 或 1).也就是说，我的 i 和 j 只能表示值 {0,1}.

But I need to convert the integer (which is natural) to std_logic. tS0 is declared as std_logic. I am only doing it one bit (0 or 1). That is, my i and j can only represent the value {0,1}.

我想我在这里采用了错误的方法.有人可以告诉我我该怎么做吗?

I think I am heading to the wrong approach here. Can someone please tell me what should I do instead?

我不认为 std_logic 有 to_unsigned 方法.我试着让 tS0 成为一个向量(1 到 0)，并像 tS0(0) <= i 一样分配，但它仍然没有锻炼.

I don't think std_logic has to_unsigned method. i tried letting tS0 to be a vector (1 down to 0), and assigned like tS0(0) <= i, and etc. But it still didn't work out.

非常感谢！

推荐答案

您将需要使用一个向量，无论是 unsigned 还是 std_logic，但它可以有点长.即:

You will need to use a vector, either unsigned or std_logic, but it can be one bit long. ie:

signal tS0 : unsigned (0 downto 0);
...
tS0 <= to_unsigned(i, tS0'length);

...或...

signal tS0: std_logic_vector(0 downto 0);
...
tS0 <= std_logic_vector(to_unsigned(i,tS0'length);

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