arm架构中的域意味着什么 [英] Domain in arm architecture means what

问题描述

当我在 Cortex-A9 MPCore 中调试 MMU 时，我总是看到域访问控制寄存器，但是，域是什么意思?最多 16 个域?谁能给我一个链接来解释这个?

When I debug MMU in Cortex-A9 MPCore, I always see Domain Access Control Register, but, what does domain means ? up to 16 domains ? Anyone can give me a link to explain this ?

推荐答案

TL;DR DACR 不仅减少了上下文切换代码路径，还可以在上下文切换发生后加快执行速度.

TL;DR The DACR not only decreases the context switch code path, but can also speed execution after the context switch occurs.

有几个链接解释了域访问控制寄存器或DACR的细节.例如ARM的内存访问权限和域.但是，此页面和许多其他页面没有解释为什么您可能需要此功能；尤其适合那些习惯使用嵌入式应用程序的人.

There are several links which explain the specifics of Domain Access Control Register or DACR. For example ARM's Memory access permissions and domains. However, this page and many others don't explain why you might need this feature; especially for people use to embedded applications.

之前的 ARM 功能(ARM 架构 V5)是 PID.此功能的原因与 DACR 和域相同.MMU 的用途是什么?

A prior ARM feature (ARM architecture V5) was the PID. The reason for this feature is the same as the DACR and domains. What is an MMU used for?

• 权限分离 - 或授予某些实体(任务、线程等)访问内存和其他有限(只读)或无访问权限.
• 内存重映射 - 虚拟到物理的转换允许稀疏/分离的内存变得连续.
• 分页 - 故障处理程序可以在权限较低的代码访问时换入/换出内存.
• 访问行为 - MMU 可以指定内存是否可缓存、读/写、应缓冲等.

DACR(和PID)只关心第一个(权限分离).在上下文切换时，操作系统必须管理这种分离.对于大多数 MMU(过去在 ARM 上)，只有两个权限是用户和超级.为了容纳多个任务，超级MMU代码必须更改 MMU 表.这很复杂，因为 ARM 有 TLB 和 缓存，两者都有虚拟地址并依赖于 MMU 表.

The DACR (and PID) are only concerned with the first (Privilege separation). On a context switch an OS must manage this separation. With most MMUs (historically on the ARM), there are only two privileges being user and super. In order to accommodate multiple tasks, the super MMU code must alter the MMU table. This is complex as the ARM has a TLB and cache, both of which have virtual addresses and depend on the MMU table.

DACR(和PID)允许 MMU 映射随着单个寄存器写入而改变.此外，TLB 和缓存也有域信息(以及PID的修改地址).这意味着不需要在上下文切换时刷新(和重新填充)这些条目.域有利于 PID，因为可以存在多个访问配置文件.例如，当主任务/线程二进制文件被切换出时，共享库代码可以在上下文切换时保持可访问性.

The DACR (and PID) allow the MMU mappings to change with a single register write. Moreover, the TLB and cache also have domain information (and modified address for PID). This means these entries do not need to be flushed (and repopulated) on a context switch. The domains are advantageous to the PID as multiple access profiles can exist. For instance, shared library code may remain accessible on a context switch while the main task/thread binary is switched out.

比较使用 DACR 与更新 MMU 表的工作.

Compare work with the DACR versus updating the MMU tables.

1. 至少更改 L1 页表以映射正确的配置文件.
2. 清除/无效L1 表和页表更新中的其他表(见下文).
3. 使 TLB 条目无效(为简单起见，很可能是整个事情).
4. 使MMU表中的缓存条目无效；可能又是整件事.

1. Change at least the L1 page tables to map correct profile.
2. clean/invalidate the L1 table and others in page table update (see below).
3. invalidate the TLB entries (most likely the whole thing for simplicity).
4. invalidate the cache entries in MMU table; probably the whole thing again.

这与更改单个寄存器相对.此外，您可能会使整个缓存和 TLB 无效.通过 DACR 和简短的上下文切换，代码/数据可以保留在 TLB 的缓存和 MMU 页表条目中.例如，具有检查电子邮件任务和电影播放器​​的系统.

This is versus changing a single register. Moreover, you will probably invalidate the entire cache and TLB. With the DACR and a brief context switch, code/data can remain in the cache and MMU page table entries in the TLB. For example, a system with a check email task and a movie player.

音频/视频的解码需要大量 CPU 和内存.有时，电子邮件客户端会轮询网络服务器以获取信息.通常什么都没有.在这个短暂的过渡期间，可能只需要一小部分(1-4k)检查电子邮件代码；单个 TLB 条目.缓存通常为 32k+，因此大部分音频/视频缓存和 TLB 条目可以保持有效.

The decoding of audio/video is highly CPU and memory intensive. Occasionally, the email client will poll a network server for information. Usually there is nothing. During this brief transition only a small (1-4k) of check email code may be needed; a single TLB entry. Cache is typically 32k+, so much of the audio/video cache and TLB entries can remain valid.

因此DACR不仅减少了上下文切换代码路径，而且还可以在上下文切换发生后加快执行速度.

So the DACR not only decreases the context switch code path, but can also speed execution after the context switch occurs.

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