是否可以在用户空间上在Linux上分配不可缓存的内存块? [英] Is it possible to allocate, in user space, a non cacheable block of memory on Linux?

问题描述

我的应用程序中有一堆缓冲区(其中25到30个)，它们很大(.5mb)，并且可以同时访问.更糟糕的是，它们中的数据通常只读取一次，并且会频繁更新(例如每秒30次).某种非最佳缓存使用的完美风暴.

I have a bunch of buffers (25 to 30 of them) in my application that are are fairly large (.5mb) and accessed simulataneousley. To make it even worse the data in them is generally only read once, and it is updated frequently (like 30 times per second). Sort of the perfect storm of non optimal cache use.

无论如何，我想到，如果我可以将一个内存块标记为不可缓存，那将是很酷的……从理论上讲，这将为其他所有内容在缓存中留出更多空间.

Anyhow, it occurred to me that it would be cool if I could mark a block of memory as non cacheable... Theoretically, this would leave more room in the cache for everything else.

那么，他们是否有办法获得在Linux中标记为不可缓存的内存块?

So, is their a way to get a block of memory marked as non cacheable in Linux?

推荐答案

How to avoid polluting the caches with data like this is covered in What Every Programmer Should Know About Memory (PDF) - This is written from the perspective of Red Hat development so perfect for you. However, most of it is cross-platform.

您想要的称为非临时访问"，并告诉处理器期望您现在正在读取的值将在一段时间内不再需要.然后，处理器避免缓存该值.

What you want is called "Non-Temporal Access" and tell the processor to expect that the value you are reading now will not be needed again for a while. The processor then avoids caching that value.

请参阅上面链接的PDF的第49页.它使用intel内在函数在缓存附近进行流传输.

See page 49 of the PDF I linked above. It uses the intel intrinsic to do the streaming around the cache.

在读取端，处理器，直到 最近，除了缺乏支持 使用非临时访问的弱提示 (NTA)预取指令.有 不等同于写合并 读取，这特别不利于 不可缓存的内存，例如 内存映射的I/O.英特尔 SSE4.1扩展，引入了NTA 负载.它们使用 少量流负载 缓冲区每个缓冲区包含一个缓存 线.第一条movntdqa指令 给定的缓存行将加载 将行缓存到缓冲区中，可能 替换另一条缓存行. 随后的16字节对齐访问 相同的缓存行将得到服务 从负载缓冲器中以很少的成本进行操作. 除非有其他原因 因此，缓存行将不会被加载 放入缓存，从而启用 加载大量内存 不会污染缓存.这 编译器为 此说明:

On the read side, processors, until recently, lacked support aside from weak hints using non-temporal access (NTA) prefetch instructions. There is no equivalent to write-combining for reads, which is especially bad for uncacheable memory such as memory-mapped I/O. Intel, with the SSE4.1 extensions, introduced NTA loads. They are implemented using a small number of streaming load buffers; each buffer contains a cache line. The first movntdqa instruction for a given cache line will load a cache line into a buffer, possibly replacing another cache line. Subsequent 16-byte aligned accesses to the same cache line will be serviced from the load buffer at little cost. Unless there are other reasons to do so, the cache line will not be loaded into a cache, thus enabling the loading of large amounts of memory without polluting the caches. The compiler provides an intrinsic for this instruction:

#include <smmintrin.h>
__m128i _mm_stream_load_si128 (__m128i *p); 

此内在函数应多次使用，其地址为 16字节的块作为 参数，直到每个缓存行是 读.只有这样，下一个缓存才可以 线开始.由于有一些 流式读取缓冲区可能是 可以从两个内存中读取 一次定位

This intrinsic should be used multiple times, with addresses of 16-byte blocks passed as the parameter, until each cache line is read. Only then should the next cache line be started. Since there are a few streaming read buffers it might be possible to read from two memory locations at once

如果在读取时通过存储器以线性顺序读取缓冲区，则对您而言将是完美的.您可以使用流式读取来执行此操作.当您要修改它们时，缓冲区将按线性顺序进行修改，并且如果您不希望很快再从同一线程读取它们，则可以使用流式写入来执行.

It would be perfect for you if when reading, the buffers are read in linear order through memory. You use streaming reads to do so. When you want to modify them, the buffers are modified in linear order, and you can use streaming writes to do that if you don't expect to read them again any time soon from the same thread.

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