AVR Assembly BRNE延迟回路如何工作? [英] How do AVR Assembly BRNE delay loops work?

问题描述

一个在线延迟循环发生器为我提供了0.5s的运行时延迟循环芯片以16MHz运行.

An online delay loop generator gives me this delay loop of runtime of 0.5s for a chip running at 16MHz.

我想到的问题是:

1. 如果寄存器变为负数，分支是否继续分支?

2. 一个人如何精确计算开始时加载的值?

1. Do the branches keep branching if the register becomes negative?

2. How exactly does one calculate the values that are loaded in the beginning?

    ldi  r18, 41
    ldi  r19, 150
    ldi  r20, 128
L1: dec  r20
    brne L1
    dec  r19
    brne L1
    dec  r18
    brne L1

推荐答案

要准确回答您的问题:

1: DEC 指令不了解带符号的数字，它只是递减一个8位寄存器.二进制补码算术的奇迹使这项工作可以绕回(0x00-> 0xFF，与0-> -1相同的位模式). DEC指令还会在状态寄存器中设置Z标志，该标志 BRNE 用于确定是否应该发生分支.

1: The DEC instruction doesn't know about 'signed' numbers, it just decrements an 8-bit register. The miracle of twos complement arithmetic makes this work at the wraparound (0x00 -> 0xFF, is the same bit pattern as 0 -> -1). The DEC instruction also sets the Z flag in the status register, which BRNE uses to determine if branching should happen.

2:您可以从AVR手册中看到DEC是单周期指令.不分支时，BRNE也是一个周期，分支时则是2个周期.因此，要计算循环时间，您需要计算每条路径的经过次数.

2: You can see from the AVR manual that DEC is a single cycle instruction. BRNE is also a single cycle when not branching, and 2 cycles when branching. therefore to compute the time of your loop, you need to count the number of times each path will be taken.

考虑一个DEC/BRNE循环:

Consider a single DEC/BRNE loop:

    ldi r8 0
L1: dec r8
    brne L1

此循环将准确执行256次，即256个DEC周期和512个BRNE周期，总共768个周期.在16MHz时，就是48us.

This loop will execute exactly 256 times, which is 256 cycles of DEC, and 512 cycles of BRNE, for a total of 768 cycles. At 16MHz, that's 48us.

将其包装在外部延迟循环中:

Wrapping that in an outer delay loop:

    ldi r7 10
    ldi r8 0
L1: dec r8
    brne L1
    dec r7
    brne L1

您会看到，每当内循环计数器达到0时，外循环计数器就会递减.因此，在我们的示例中，外循环DEC/BRNE将发生10次(768个周期)，而内循环将发生10 * 256次，因此此循环的总时间为10 * 48us + 48us(528s).同样适用于3个嵌套循环.

You can see that the outer loop counter will decrement every time the inner loop counter hits 0. Thus in our example the outer loop DEC/BRNE will happen 10 times(for 768 cycles), and the inner loop will happen 10*256 times so the total time for this loop is 10*48us + 48us for 528s. Similarly for 3 nested loops.

从这里很容易弄清楚每个循环应执行多少次才能达到所需的延迟.这是最大的迭代次数，外循环可以执行少于所需时间的操作，然后取出该时间，对下一个嵌套循环执行相同的操作，依此类推，直到最内层的循环填满剩下的一小部分.

From here, it's trivial to figure out how many times each loop should execute to achieve the desired delay. It's the largest number of iterations the outer loop can do less than the desired time, then taking that time out, do the same for the next nested loop, and so on until the inner most loop fills up the tiny amount left.

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