Makefile中有多个冒号和等号(需要说明) [英] Multiple colons and equal sign in makefile (need explanation)

问题描述

这只是makefile的一部分.我不太了解发生了什么.

This is only a segment of a makefile. I don't quite understand what is going on.

OBJS = $(SRCS:$(SRC)/%.cpp=$(OBJ)/%.o)
$(OBJS):$(OBJ)/%.o: $(SRC)/%.cpp | print-opts
    $(cc-command)

我所了解的是这些行在'print-opts'之后使用'cc-command'将.cpp文件编译为.o.但是我不理解语义.

All I understand is these lines compile .cpp files into .o, after 'print-opts', with 'cc-command'. But I don't understand the semantics.

如果我扩展"OBJS"的宏，则此行应为:

If I expand the macro of 'OBJS', this line should be:

$(SRCS:$(SRC)/%.cpp=$(OBJ)/%.o) : $(OBJ)/%.o: $(SRC)/%.cpp | print-opts
    $(cc-command)

在我看来，它看起来像在'$(SRCS:$(SRC)/％.cpp = $(OBJ)/％.o)'中，它声称$(SRC)中的所有.cpp都将以.o开头在$(OBJ)中，但这取决于$(OBJ)/％.o，而后者取决于$(SRC)/％.cpp.这没有道理...

To me, it looks like in '$(SRCS:$(SRC)/%.cpp=$(OBJ)/%.o)', it claims all .cpp in $(SRC) would come to .o in $(OBJ), but this would depend on $(OBJ)/%.o, which depends on $(SRC)/%.cpp. This doesn't make sense...

我不明白等号在这里是什么意思，以及多个冒号是什么意思.

I don't understand what is the meaning of equal sign here, and what multiple colons mean.

推荐答案

假设您已经定义了这三个变量(如果没有定义，则该规则将无法很好地工作):

Suppose you've defined these three variables (and if you haven't, the rule won't work very well):

SRC = source_dir
OBJ = object_dir
SRCS = source_dir/foo.cpp source_dir/bar.cpp

现在考虑分配

OBJS = $(SRCS:$(SRC)/%.cpp=$(OBJ)/%.o)

这是替代参考；它说:对于$(SRCS)中形式为$(SRC)/%.cpp的任何内容，请将其更改为$(OBJ)/%.o".因此OBJS的评估结果为object_dir/foo.o object_dir/bar.o.

This is a substitution reference; it says "for anything in $(SRCS) that has the form $(SRC)/%.cpp, change it to $(OBJ)/%.o". So OBJS will evaluate to object_dir/foo.o object_dir/bar.o.

现在是规则:

$(OBJS):$(OBJ)/%.o: $(SRC)/%.cpp | print-opts
    $(cc-command)

Thuis是静态模式规则.它指定目标列表($(OBJS))，目标模式($(OBJ)/%.o)和先决条件模式($(SRC)/%.cpp). Make将目标与目标模式匹配，并使用该模式构造先决条件名称.因此，如果Make使用此规则构建object_dir/foo.o，则词干将为foo，前提条件为source_dir/foo.cpp.

Thuis is a static pattern rule. It specifies a list of targets ($(OBJS)), a target pattern ($(OBJ)/%.o) and a prerequisite pattern ($(SRC)/%.cpp). Make matches a target to the target pattern, and uses that to construct the prerequisite name. So if Make used this rule to build object_dir/foo.o, the stem would be foo and the prerequisite would be source_dir/foo.cpp.

(您没有询问| print-opts，所以我认为已经很清楚了.)

(You didn't ask about | print-opts, so I assume that it's already clear.)

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