如何从一个makefile构建多个目标 [英] How to build multiple targets from one makefile

问题描述

我正在尝试参数化我的makefile目标.目前，它有一个

I'm trying to parameterize my makefile targets. Currently, it has a

TARGET = main

顶部附近的声明.它从中导出SRC列表以及其他许多内容.

declaration near the top. It derives the SRC list from that as well as does lots of other things.

不过，我已经更改了C代码，因此我有多个不同的顶级.c文件，它们基本上可以获取变体版本.所以我想要做的基本上是做

I've changed my C code though, so that I have multiple different top level .c files to basically get variant builds. So what I want to be able to do is basically do

make target1

或

make target2

并更改在makefile中将TARGET设置为什么.我很困惑如何做到这一点.我以为我可能会添加类似的内容

And vary what TARGET is set to in the makefile. I'm confused how to accomplish this. I thought I might add something like

target1: all
    TARGET=target1

这似乎一点也不奏效.有一种通用的模式可以做到这一点吗?

This didn't seem to work too well at all though. Is there a general pattern for how one does this?

推荐答案

参数化的变量名和特定于目标的变量可能会做您想要的，因为特定于目标的变量的值通常会被其先决条件继承"目标(假设您使用的是GNU make):

Parameterized variable names and target-specific variables may do what you want, as the value of a target-specific variable is normally "inherited" by the prereqs of that target (assuming you are using GNU make):

target1_SRC=123 456
target2_SRC=abc def

target1: TARGET=target1
target2: TARGET=target2

target1: all
target2: all

all: ; @echo $($(TARGET)_SRC)

然后您可以运行make target1或make target2，例如:

Then you can run make target1 or make target2, for example:

$ make target1
123 456
$ make target2
abc def

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