生成文件.如何从编译中排除一个特定文件? [英] Makefile. How to exclude one particular file from compilation?

问题描述

我正在尝试从以下规则定义的要编译的文件列表中排除 main.cpp 文件:

I am trying to exclude main.cpp file from the list of files to be compiled defined by the rule below:

$(TMPDIRPATH)%.o: %.cpp
    @echo compile $<
ifneq ($(notdir $<), main.cpp)
        @$(COMPILE.cpp) $(OUTPUT_OPTION) $<
endif

此"ifneq"条件始终评估为true，这很奇怪.我究竟做错了什么?是否有更好的方法从明确规则中排除一个文件?

This 'ifneq' condition always evaluates to true, which is bizarre. What am I doing wrong? Is there a better way to exlude one file from an explicit rule?

推荐答案

这不是最好的方法，但是如果按照以下方式进行操作，请将其写为shell条件，而不要使用GNU make conditionalals:

That isn't the best way to do it, but if you do it along these lines, write it as a shell condition, not using GNU make conditionals:

$(TMPDIRPATH)%.o: %.cpp
    @echo compile $<
    @if [ $(notdir $<) != main.cpp ]; \
    then $(COMPILE.cpp) $(OUTPUT_OPTION) $<; \
    fi

需要继续标记(反斜杠).分号也是如此.在调用外壳解释它们之前，以$为前缀的值将被make扩展.您可能也不想在回声所在的位置.您可能需要:

The continuation markers (backslashes) are needed. So are the semicolons. The values prefixed with $ will be expanded by make before the shell is invoked to interpret them. You probably don't want the echo where it is, either. You probably need:

$(TMPDIRPATH)%.o: %.cpp
    @if [ $(notdir $<) != main.cpp ]; \
    then echo compile $<; \
         $(COMPILE.cpp) $(OUTPUT_OPTION) $<; \
    fi

我希望这样做的方法是使用要编译的文件列表.使用任何通配符机制都会导致在添加额外文件(其他测试或不是系统真正组成部分的杂散文件)时出现问题.

The way I would expect to do it is with a list of the files to be compiled. Using any wild card mechanism leads to problems when extra files are added - other tests, or stray files that aren't really part of the system.

评论说:但是GNU Make Manual说ifneq应该可以."

The comment says "But the GNU Make Manual says ifneq should work".

如果正确放置ifneq，它将起作用，这意味着未缩进作为与规则关联的命令的一部分".因此，您可以写一些类似的东西(一个令人震惊的例子，但我的大脑处于混乱状态):

The ifneq would work if it were positioned correctly, which means 'not indented as part of the commands associated with a rule'. You could, therefore, write something like (an appallingly bad example, but my brain's on the fritz):

ifneq (${CFLAGS}, -Wall)
CFLAGS += -Wall
endif

file1.o: file1.c
    ${CC} ${CFLAGS} -c $<

但是，当按问题缩进ifneq时，当make运行shell处理该命令时，它只是在系统上实际上找不到的命令.

But when the ifneq is indented as in the question, it is just a command that actually isn't found on the system when the make runs the shell to process the command.

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