在Makefile中加载.env文件 [英] Load .env file in Makefile

问题描述

是否有一种简单的方法可以将包含本地配置的文件自动加载到Makefile?

Is there a simple way to automatically load a file containing local configurations into a Makefile?

我有一个文件.env，每行包含key=value对:

I have a file, .env, containing key=value pairs on each line:

var1=val1
var2=val2

目前，我正在像这样手动将每个变量导入到我的Makefile中:

Currently I am importing each variable into my Makefile manually like this:

  var1=$$(grep '^var1=' .env | cut -d= -f2-)

添加更多变量时，这会显得笨拙且易于出现错误.

This feels clumsy and prone to bugs when adding more variables.

我还尝试过在Makefile中添加一个额外的目标，以读取.env的每一行并将其传递给export，但是在一个目标中导出的值对其他目标不可用.

I have also tried adding an extra target to the Makefile to read each line of .env and pass it to export, but values exported in one target are not available to others.

我希望在make中具有执行此操作的内置功能，但是我无法找到它的文档.

I expect there is a built in feature for doing this in make, but I have not been able to find documentation for it.

推荐答案

假定您的包含文件完全由有效的make分配组成，则

Assuming your include file is comprised entirely of valid make assignments then the include directive is likely what you want here.

include指令告诉make在继续操作之前要暂停读取当前的makefile并读取一个或多个其他makefile.该指令是makefile中的一行，如下所示:

The include directive tells make to suspend reading the current makefile and read one or more other makefiles before continuing. The directive is a line in the makefile that looks like this:

include filenames…

文件名可以包含外壳文件名模式.

filenames can contain shell file name patterns.

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