make每次都会重新编译所有内容，为什么? [英] make recompiles everything every time, why?

问题描述

这是我的makefile:

Here's my makefile:

all: lex yacc compile

lex: sql.l
    lex -i sql.l

yacc: sql.y
    yacc -d -v sql.y

compile: y.tab.c lex.yy.c
    $(CC) -o sql_parser y.tab.c lex.yy.c -ly -ll

test: all
    @./parsesql.sh selecttest.sql
    @./parsesql.sh insertintotest.sql
    @./parsesql.sh deletefromtest.sql
    @./parsesql.sh createtest.sql

cleanup:
    rm test.tab.cacc
    rm y.output

运行make始终会触发完全重新编译，即使没有任何变化:

Running make will always trigger a full recompile, even if nothing has changed:

parsesql>  make
lex -i sql.l
yacc -d -v sql.y
cc -o sql_parser y.tab.c lex.yy.c -ly -ll
parsesql>  make
lex -i sql.l
yacc -d -v sql.y
cc -o sql_parser y.tab.c lex.yy.c -ly -ll
parsesql>  make
lex -i sql.l
yacc -d -v sql.y
cc -o sql_parser y.tab.c lex.yy.c -ly -ll

所有文件都没有更改，那么为什么要这样做呢? lex和yacc命令仅应在sql.l或sql.y分别更改的情况下才触发，否?

None of the files have changed, so why is it doing this? The lex and yacc commands should only trigger if sql.l or sql.y respectively have changed, no?

推荐答案

您的目标都不是真实文件.将它们命名为要生成的实际文件的名称，以便make可以找到它们并检查时间戳.

Your targets are all not real files. Make them the names of the actual files you're generating so that make can find them and check timestamps.

示例:

all: sql_parser

lex.yy.c: sql.l
    lex -i sql.l

y.tab.c: sql.y
    yacc -d -v sql.y

sql_parser: y.tab.c lex.yy.c
    $(CC) -o sql_parser y.tab.c lex.yy.c -ly -ll

test: all
    @./parsesql.sh selecttest.sql
    @./parsesql.sh insertintotest.sql
    @./parsesql.sh deletefromtest.sql
    @./parsesql.sh createtest.sql

cleanup:
    rm test.tab.cacc
    rm y.output

您可以添加.PHONY: all test cleanup来指示make这些目标不是真实文件.

You can add .PHONY: all test cleanup to indicate to make that those targets are not intended to be real files.

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