匹配.c或.cpp的Makefile隐式规则 [英] Makefile implicit rules matching .c OR .cpp

问题描述

我正在尝试将隐式规则添加到Makefile中，我希望它以相同的方式处理.c和.cpp文件的编译.我对.c文件的规则如下:

I'm trying to add an implicit rule to a Makefile, and I'd like it to handle compilation of .c and .cpp files the same way. The rule I have for .c files is as follows:

%.obj: %.c
    cl /c $(CFLAGS) $<

不过，我想要的是模式的右侧，以匹配.c或.cpp，具体取决于可用的文件.这可能吗?我已经仔细阅读过制作"手册，但是没有找到我想要的东西.任何帮助将不胜感激.

What I'd like, though, is for the right side of the pattern to match .c OR .cpp, depending on which file is available. Is this possible? I've perused the Make manual, but haven't found what I'm looking for. Any help would be greatly appreciated.

推荐答案

只需使用两个与make语言中的或"等效的规则:

Just use two rules which is equivalent to "or" in the make language:

%.obj: %.c
    cl /c $(CFLAGS) $<

%.obj: %.cpp
    cl /c $(CFLAGS) $<

最后，这些 是两种不同的源语言，您可能最终会期望使用不同的标志.

At the end these are two different source languages and you may well end up desiring different flags.

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