如果将存储器组织为字,为什么将程序计数器增加1,而对于字节,为什么将程序计数器增加2? [英] Why is program counter incremented by 1 if memory organised as word and by 2 in case of bytes?

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问题描述

如果在计算机中一条指令是16位的,并且如果存储器被组织为16位字,则通过在当前指令的地址中加一个来评估下一条指令的地址.如果将存储器组织为字节,可以单独寻址,那么我们需要在当前指令地址中添加两个,以获取要按顺序执行的下一条指令的地址.为什么会这样呢?请解释这个概念.我是计算机组织和汇编语言编程的新手,所以感谢您的帮助.谢谢.

If in a computer an instruction is of 16 bits and if memory is organized as 16-bits words, then the address of the next instruction is evaluated by adding one in the address of the current instruction. In case, the memory is organized as bytes, which can be addressed individually, then we need to add two in the current instruction address to get the address of the next instruction to be executed in sequence. Why is it so?? Please explain this concept. I am new to computer organisation and assembly language programming so any help is appreciated. Thanks.

推荐答案

您的问题并未说明您要指的是什么体系结构.

Your question does not say what architecture you are referring to.

谈论不允许指令与字节对齐的设计,您描述的行为 CPU有所不同

Talking about designs that do not allow instructions to be aligned to bytes, the behavior you describe differs from CPU to CPU!

首先,我们看一下8位CPU上地址"的含义.在此类CPU上,从内存中的一个字节到下一个字节时,地址将增加1:

First we look at the meaning of the "address" on 8-bit CPUs. On such CPUs the address is increased by 1 when going from one byte to the next byte in memory:

Address   Meaning
0         1st byte in memory
1         2nd byte in memory
2         3rd byte in memory
3         4th byte in memory
4         5th byte in memory
...

68000 使用类似的寻址方式,例如8位CPU.但是,存储器实际上是以16位为单位组织的,指令必须从偶数地址开始,并且必须是16位的倍数.因此,程序计数器始终包含一个偶数.在每条指令期间,它会增加2 或2的倍数.

The 68000 uses a similar addressing like 8-bit CPUs. However, the memory is actually organized in 16-bit units and instructions must start at an even address and are a multiple of 16 bits long. Therefore the program counter always contains an even value. It will increase by 2 or a multiple of 2 during each instruction.

(仅允许将奇数地址用于按字节访问(读/写),这实际上会在后台执行16位存储访问.)

(Using odd addresses is only allowed for byte-wise memory access (read/write) which will actually perform a 16-bit memory access in the background.)

对于 TMS9900 (16位CPU),地址以16位为单位递增1;可以访问它们之间的字节,但是地址是通过添加0x8000来形成的:

For the TMS9900 (a 16-bit CPU) the address is increasing by 1 for 16 bits; the bytes in between can be accessed but the addresses are formed by adding 0x8000:

Address   Meaning
0         1st byte in memory
0x8000    2nd byte in memory
1         3rd byte in memory
0x8001    4th byte in memory
2         5th byte in memory
...

此处,程序计数器可能包含奇数或偶数,但不能包含大于0x7FFF的值,因为这将指向未进行16位对齐的字节.当然,当指令为16位长时,程序计数器会加1 .

The program counter may contain an odd or an even value here, but not a value above 0x7FFF because this would refer to a byte which is not 16-bit aligned. Of course, the program counter will increase by 1 when the instruction is 16 bits long.

TMS320 不允许寻址奇数字节:

The TMS320 does not allow addressing odd bytes:

Address       Meaning
0             1st + 2nd byte in memory
not possible  2nd + 3rd byte in memory
1             3rd + 4th byte in memory
2             5th + 6th byte in memory
...

在此设计中,当指令为16位长时,程序计数器也将加1 .

In this design the program counter will also increase by 1 when the instruction is 16 bits long.

LittleMIPS (或类似名称;我不记得正确的名称)设计是一种简化的MIPS CPU,旨在让学生学习微芯片设计.它仅允许32位内存访问和仅4位对齐的地址:

The LittleMIPS (or similar; I don't remember the correct name) design is a reduced MIPS CPU intended for students to learn microchip design. It allows only 32-bit memory access and only 4-aligned addresses:

Address       Meaning
0             1st to 4th byte in memory
1             address does not exist
2             address does not exist
3             address does not exist
4             5th to 8th byte in memory
5             address does not exist
...

在这种设计下,程序计数器将始终包含4的倍数.由于每条指令正好是4个字节长,因此在指令执行期间,程序计数器将增加4 .

On this design the program counter will always contain a multiple of 4. Because each instruction is exactly 4 bytes long, the program counter will increase by 4 during an instruction.

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