为什么摩尔定律需要并行计算? [英] Why does Moore's Law necessitate parallel computing?
问题描述
这是我的一本CS教科书中的一个问题.我很茫然.我不明白为什么它一定会导致并行计算.有人想指出我正确的方向吗?
This was a question in one of my CS textbooks. I am at a loss. I don't see why it necessarily would lead to parallel computing. Anyone wanna point me in the right direction?
推荐答案
摩尔定律只是说，价格合理的集成电路上的晶体管数量往往每两年增加一倍.
Moore's law just says that the number of transistors on a reasonably priced integrated circuit tends to double every 2 years.
关于速度，晶体管密度或芯片尺寸的观察都与原始观察结果有些正交.
Observations about speed or transistor density or die size are all somewhat orthogonal to the original observation.
这就是为什么我认为摩尔定律不可避免地导致并行计算的原因:
Here's why I think Moore's law leads inevitably to parallel computing:
如果您将晶体管的数量增加一倍，您将如何处理它们?
If you keep doubling the number of transistors, what are you going to do with them all?
- 更多说明！
- 更广泛的数据类型！
- 浮点数学！
- 更多缓存(L1，L2，L3)！
- 微型行动！
- 更多的管道阶段！
- 分支预测！
- 投机执行！
- 数据预取！
- 单指令多数据！
- More instructions!
- Wider data types!
- Floating Point Math!
- More caches (L1, L2, L3)!
- Micro Ops!
- More pipeline stages!
- Branch prediction!
- Speculative execution!
- Data Pre-Fetch!
- Single Instruction Multiple Data!
最终，当您实现了所有可以想到的使用所有这些额外晶体管的技巧时，您最终都会对自己进行思考:为什么我们不对随附芯片上的所有这些很棒的技巧进行两次TWICE?
Eventually, when you've implemented all the tricks you can think of to use all those extra transistors, you eventually think to yourself: why don't we just do all those cool tricks TWICE on the came chip?
八大兵.八大繁荣.多核是不可避免的.
Bada bing. Bada boom. Multicore is inevitable.
顺便说一句，我认为具有多个相同CPU内核的CPU的当前趋势也将最终消退，未来的实际处理器将具有单个主内核，一组通用内核和一组专用内核.协处理器(如图形卡，但与CPU和缓存一起使用).
Incidentally, I think the current trend of CPUs with multiple identical CPU cores will eventually subside as well, and the real processors of the future will have a single master core, a collection of general purpose cores, and a collection of special purpose coprocessors (like a graphics card, but on-die with the CPU and caches).
IBM Cell处理器(在PS3中)已经有点像这样.它具有一个主核心和七个协同处理单元".
The IBM Cell processor (in the PS3) is already somewhat like this. It has one master core and seven "synergistic processing units".
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