默认情况下使用哪个段寄存器? [英] Which segment register is used by default?
问题描述
我正在从《英特尔手册》研究计算机体系结构.我了解的是,我们给出的指令是由段选择器和偏移量组成的逻辑地址.
基本上是CS register<<4 + offset
. Segment Selector
映射到段选择器的TI
位中指定的 GDT 或 LDT . GDT由具有BASE
,LIMIT
和RPL
的Segment Descriptors
组成,并且输出是基地址.此base address
+ offset
提供了logical address
.
I am studying computer architecture from the Intel Manual. The thing that I understand is that the instructions that we give are logical addresses which consist of a segment selector and an offset.
It is basically CS register<<4 + offset
. The Segment Selector
maps to the GDT or LDT as given in the TI
bit of the segment selector. GDT consists of Segment Descriptors
which have BASE
, LIMIT
and RPL
and the output is base address. This base address
+ offset
provides the logical address
.
哪些规则决定哪个段寄存器(SS
,DS
等)适用于不同的内存操作?例如是什么决定mov eax, [edi]
使用哪个段?
What are the rules that decide which segment register (SS
, DS
, etc.) applies to different memory operations? e.g. what determines which segment is used for mov eax, [edi]
?
推荐答案
您可以使用段覆盖前缀来选择哪个段将应用于指令中的内存操作数.
You can use a segment override prefix to select which segment will apply to the memory operand in an instruction.
代码提取始终使用CS
.
大多数情况下默认时间是DS
(例如mov eax, [edi]
).一些反汇编程序即使在默认情况下也可以使该段显式显示,因此您会看到很多DS:
会使反汇编输出混乱.
The default most of the time is DS
(e.g. for mov eax, [edi]
). Some disassemblers make the segment explicit even when it's the default, so you see a lot of DS:
cluttering up the disassembly output.
movs
指令从[DS:ESI]
并写入[ES:EDI]
,从而可以轻松在段之间进行复制,而无需使用段覆盖前缀.其他一些字符串指令也使用ES
.
The movs
instruction reads from [DS:ESI]
and writes to [ES:EDI]
, making it easy to copy between segments without segment override prefixes. Some other string instructions also use ES
.
使用esp
或ebp
作为基址寄存器的内存操作数默认为SS
,因此对
Memory operands using esp
or ebp
as the base register default to SS
, and so do the implicit accesses for stack instructions like push
/pop
/call
/ret
.
FS
和GS
从来都不是默认值,因此可以在诸如32位和64位现代操作系统的平面内存模型系统中用于特殊目的(例如线程本地存储).
FS
and GS
are never the default, so they can be used for special purposes (like thread-local storage) in a flat memory model system like modern 32 and 64-bit OSes.
This is also documented officially in Intel's ISA manuals. e.g. in Volume 2 (the instruction-set ref), Table 2-1. 16-Bit Addressing Forms with the ModR/M Byte has a footnote saying:
对于包含BP索引的有效地址,默认段寄存器为SS,对于其他有效地址,默认段寄存器为DS.
The default segment register is SS for the effective addresses containing a BP index, DS for other effective addresses.
(请注意,SP对于16位寻址模式不是有效的基址.)
(note that SP isn't a valid base address for 16-bit addressing modes.)
没有用于32位或64位寻址模式的等效脚注,因此详细信息必须在手册的另一卷中.
There's no equivalent footnote for 32 or 64-bit addressing modes, so the details must be in another volume of the manual.
另请参见 x86 标签Wiki的问题,以了解更多信息链接.
See also the x86 tag wiki for more links.
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