ARM，Thumb和Thumb 2指令编码之间有什么区别? [英] What is the difference between the ARM, Thumb and Thumb 2 instruction encodings?

问题描述

我对指令集有些困惑.有Thumb，ARM和Thumb2.据我了解，Thumb指令都是16位的，但是在 ARMv7M用户手册(第vi页)中，有Thumb 16位和Thumb 32位的指令提及.

I am a bit confused about instruction sets. There are Thumb, ARM and Thumb 2. From what I have read Thumb instructions are all 16-bit but inside the ARMv7M user manual (page vi) there are Thumb 16-bit and Thumb 32-bit instructions mentioned.

现在我必须克服这种困惑.据说Thumb 2支持16位和32位指令.那么，ARMv7M是否实际上支持Thumb 2指令，而不仅支持Thumb?

Now I have to overcome this confusion. It is said that Thumb 2 supports 16-bit and 32-bit instructions. So is ARMv7M in fact supporting Thumb 2 instructions and not just Thumb?

还有一件事.我能说Thumb(32位)和ARM指令都是32位吗?

One more thing. Can I say that Thumb (32-bit) is the same as ARM instructions which are allso 32-bit?

推荐答案

哦，ARM及其愚蠢的命名方式...

Oh, ARM and their silly naming...

这是一个普遍的误解，但是正式地没有"Thumb-2指令集"之类的东西.

It's a common misconception, but officially there's no such thing as a "Thumb-2 instruction set".

从ARMv4T到ARMv7-A，忽略ARMv8(将所有内容重命名并使AArch64使事情变得复杂)，有两个指令集:ARM和Thumb.从它们在具有32位地址的32位宽的寄存器中对最多32位宽的数据进行操作的意义上来说，它们都是"32位".实际上，它们重叠的地方表示的是完全相同的指令-只是 encoding 指令有所不同，而CPU实际上只有两个不同的解码前端可以在其管道之间进行切换.为了清楚起见，我现在刻意避免使用术语"32位"和"16位" ...

Ignoring ARMv8 (where everything is renamed and AArch64 complicates things), from ARMv4T to ARMv7-A there are two instruction sets: ARM and Thumb. They are both "32-bit" in the sense that they operate on up-to-32-bit-wide data in 32-bit-wide registers with 32-bit addresses. In fact, where they overlap they represent the exact same instructions - it is only the instruction encoding which differs, and the CPU effectively just has two different decode front-ends to its pipeline which it can switch between. For clarity, I shall now deliberately avoid the terms "32-bit" and "16-bit"...

ARM指令具有固定宽度的4字节编码，需要4字节对齐. Thumb指令具有可变长度(2或4字节，现在称为窄"和宽")编码，需要2字节对齐-大多数指令具有2字节编码，但是bl和blx始终具有4字节编码 ^* .真正令人困惑的是ARMv6T2，它引入了"Thumb-2技术". Thumb-2不仅包括向Thumb添加更多的加载指令(大多数使用4字节编码)，使其几乎与ARM处于同等地位，还扩展了执行状态以允许大多数Thumb指令有条件地执行，最后引入了一个全新的汇编语法(UAL，统一汇编语言")取代了以前的单独的ARM和Thumb语法，并允许编写一次代码并将其组装到任一指令集而无需修改.

ARM instructions have fixed-width 4-byte encodings which require 4-byte alignment. Thumb instructions have variable-length (2 or 4-byte, now known as "narrow" and "wide") encodings requiring 2-byte alignment - most instructions have 2-byte encodings, but bl and blx have always had 4-byte encodings^*. The really confusing bit came in ARMv6T2, which introduced "Thumb-2 Technology". Thumb-2 encompassed not just adding a load more instructions to Thumb (mostly with 4-byte encodings) to bring it almost to parity with ARM, but also extending the execution state to allow for conditional execution of most Thumb instructions, and finally introducing a whole new assembly syntax (UAL, "Unified Assembly Language") which replaced the previous separate ARM and Thumb syntaxes and allowed writing code once and assembling it to either instruction set without modification.

Cortex-M架构仅实现Thumb指令集-ARMv7-M(Cortex-M3/M4/M7)支持大多数"Thumb-2技术"，包括条件执行和VFP指令的编码，而ARMv6-M (Cortex-M0/M0 +)仅以少数4字节系统指令的形式使用Thumb-2.

The Cortex-M architectures only implement the Thumb instruction set - ARMv7-M (Cortex-M3/M4/M7) supports most of "Thumb-2 Technology", including conditional execution and encodings for VFP instructions, whereas ARMv6-M (Cortex-M0/M0+) only uses Thumb-2 in the form of a handful of 4-byte system instructions.

因此，新的4字节编码(以及稍后在ARMv7版本中添加的编码)仍然是 Thumb指令-它们的"Thumb-2"方面是它们可以具有 4字节编码，并且它们(可以)(大部分)可以通过it有条件地执行(我想，它们的代码仅在UAL中定义).

Thus, the new 4-byte encodings (and those added later in ARMv7 revisions) are still Thumb instructions - the "Thumb-2" aspect of them is that they can have 4-byte encodings, and that they can (mostly) be conditionally executed via it (and, I suppose, that their menmonics are only defined in UAL).

_{*在ARMv6T2之前，实际上是关于将bl(或blx)作为4字节指令还是作为2字节指令对执行的复杂实现细节.架构上的定义是后者，但是由于只能将它们按顺序执行成对执行，因此出于性能考虑，将它们融合为一条指令几乎不会造成任何损失(除了在中途中断的能力之外). ARMv6T2只是根据融合的单指令执行来重新定义事物}

_{* Before ARMv6T2, it was actually a complicated implementation detail as to whether bl (or blx) was executed as a 4-byte instruction or as a pair of 2-byte instructions. The architectural definition was the latter, but since they could only ever be executed as a pair in sequence there was little to lose (other than the ability to take an interrupt halfway through) by fusing them into a single instruction for performance reasons. ARMv6T2 just redefined things in terms of the fused single-instruction execution}

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