SystemVerilog遍历层次结构 [英] SystemVerilog looping through hierarchy

问题描述

我在寄存器块Regblock中实例化了这样的寄存器:

I have registers instantiated in a Register block Regblock as such:

DUT.Regblock.Register1
DUT.Regblock.RegisterA
DUT.Regblock.RegisterABC
...

所有这些寄存器具有相同的内部结构. 我想在这些寄存器中模拟位翻转的效果.

All these registers have the same inner structure. I would like to simulate the effects of bit flips in these registers.

//Here an attempt to do bit flips
bitFlipLocation = $random;
force  DUT.RegBlock.Register1.reg[bitFlipLocation] = ~DUT.RegBlock.Register1.reg[bitFlipLocation];
release DUT.ABCStar1.RegBlock.Register1.reg[bitFlipLocation];

是否可以在RegBlock内部的所有DUT.Regblock.Register1, RegisterA, RegisterABC, ...上创建循环并创建这些位翻转?

Is there a way to create a loop over all DUT.Regblock.Register1, RegisterA, RegisterABC, ... inside RegBlock and create these bit flips?

推荐答案

有多种方法可以执行此操作，但不能在SystemVerilog语言本身中进行.您可以用C编写VPI代码以遍历块名称，并使用C API施加作用力.或者，您可以使用特定于工具的命令来迭代块名称，并使用命令(通常为Tcl)来施加力.

There are ways to do this, but not within the SystemVerilog language itself. You can write VPI code in C to iterate over block names and apply the forces use the C API. Or you can use tool specific commands to iterate of block names and use commands (usually Tcl) to apply the forces.

这两个都不在本论坛可以显示的范围之内.

Both of those are beyond the scope of what can be shown in this forum.

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