INVD指令有什么用? [英] What use is the INVD instruction?

问题描述

x86 INVD 使缓存层次结构无效，而无需将内容写回记忆中.

The x86 INVD invalidates the cache hierarchy without writing the contents back to memory, apparently.

我很好奇，这样的指令有什么用?鉴于人们几乎无法控制各种高速缓存级别中的哪些数据，甚至还很少控制可能已经异步刷新的数据，这似乎只是一种确保您只是不知道什么数据的方法而已.被保存在内存中了.

I'm curious, what use is such an instruction? Given how one has very little control over what data may be in the various cache levels and even less control over what may have already been flushed asynchronously, it seems to be little more than a way to make sure you just don't know what data is held in memory anymore.

推荐答案

一个很好的问题！

诸如invd这样的钝器指令的一个用例是专用的或非常早的引导代码，例如尚未验证RAM是否存在的情况.由于我们可能不知道RAM是否存在，它的大小，或者甚至它的特定部分是否正常工作，或者我们可能不希望依赖于它，因此CPU将自己的缓存的一部分编程为RAM有时是有用的并按原样使用它.这称为 RAM缓存(CAR).在设置CAR的过程中，使用CAR的过程中以及拆除CAR模式的过程中，内核必须确保从该高速缓存中将任何内容都写到内存中.

One use-case for such a blunt-acting instruction as invd is in specialized or very-early-bootstrap code, such as when the presence or absence of RAM has not yet been verified. Since we might not know whether RAM is present, its size, or even if particular parts of it function properly, or we might not want to rely on it, it's sometimes useful for the CPU to program part of its own cache to operate as RAM and use it as such. This is called Cache-as-RAM (CAR). During setup of CAR, while using CAR, and during teardown of CAR mode, the kernel must ensure nothing is ever written out from that cache to memory.

要设置CAR，必须将CPU设置为免填充缓存模式，并且必须将要用于CAR的内存范围指定为回写.这可以通过以下步骤完成:

To set up CAR, the CPU must be set to No-Fill Cache Mode and must designate the memory range to be used for CAR as Write-Back. This can be done by the following steps:

1. 设置 MTRR(内存类型范围寄存器)，以将一块内存指定为 WB(回写).
2. invd整个缓存，防止任何缓存的写入被写出并造成混乱.
3. 将缓存模式设置为普通缓存模式(cr0.CD=0).
4. 在普通缓存模式中，通过读取来触摸"要用作CAR的内存范围的所有缓存行，从而用它填充缓存.只能在普通缓存模式" 中填充缓存行.
5. 将缓存模式设置为免填充缓存模式(cr0.CD=1).

1. Set up an MTRR (Memory Type Range Register) to designate a chunk of memory as WB (Write-Back).
2. invd the entire cache, preventing any cached write from being written out and causing chaos.
3. Set caching mode to Normal Cache Mode (cr0.CD=0).
4. While in Normal Cache Mode, "touch" all cachelines of the memory span to be used as CAR by reading it, and thus filling the cache with it. Filling cachelines can only be done in Normal Cache Mode.
5. Set caching mode to No-Fill Cache Mode (cr0.CD=1).

使用汽车

设置CAR的动机是，一旦设置好，CAR区域内的所有访问(读/写)都将到达缓存，而不会到达RAM，但是缓存的内容将是可寻址的，并且就像RAM.因此，现在不再需要编写仅使用寄存器的汇编程序代码，现在可以使用普通的C代码，只要它访问的堆栈和局部/全局变量限于CAR区域之内即可.

Using CAR

The motivation for setting up CAR is that once set up, all accesses (read/write) within the CAR region will hit cache and will not hit RAM, yet the cache's contents will be addressable and act just like RAM. Therefore, instead of writing assembler code that only ever uses registers, one can now use normal C code, provided that the stack and local/global variables it accesses are restricted to within the CAR region.

退出CAR时，对于在此伪RAM"中发生的所有内存写入突然从缓存中弹出并在RAM中相同地址处丢弃任何实际内容，将是一件坏事.因此，当退出CAR时，再次使用invd完全删除CAR区域的内容，然后设置 Normal Cache Mode .

When CAR is exited, it would be a bad thing for all of the memory writes incurred in this "pseudo-RAM" to suddenly shoot out from cache and trash any actual content at the same address in RAM. So when CAR is exited, once again invd is used to completely delete the contents of the CAR region, and then Normal Cache Mode is set up.

英特尔在 i486中提到了高速缓存微处理器程序员参考手册. Intel 80486是最早引入invd指令的CPU.第12.2节如下:

Intel alluded to the Cache-as-RAM use in the i486 Microprocessor Programmer's Reference Manual. The Intel 80486 was the CPU that first introduced the invd instruction. Section 12.2 read:

12.2内部缓存的操作

软件控制缓存的操作模式.可以启用缓存(重置初始化后的状态)，可以在存在有效的缓存行的情况下禁用缓存(一种模式，其中缓存的作用类似于快速的内部RAM)，或者可以完全禁用缓存.

12.2 OPERATION OF THE INTERNAL CACHE

Software controls the operating mode of the cache. Caching can be enabled (its state following reset initialization), caching can be disabled while valid cache lines exist (a mode in which the cache acts like a fast, internal RAM), or caching can be fully disabled.

禁用高速缓存时必须遵循注意事项.当CD设置为1时，如果副本仍在高速缓存中，则i486处理器将不会读取外部存储器.每当NW设置为1时，如果数据在高速缓存中，则i486处理器将不会写入外部存储器.这意味着过时的数据可以在i486 CPU缓存中生成.如果以后将NW设置为0或由于高速缓存未命中而随后将该高速缓存行覆盖，则该过时的数据将不会写入外部存储器.通常，禁用缓存后应刷新缓存.

Precautions must be followed when disabling the cache. Whenever CD is set to 1, the i486 processor will not read external memory if a copy is still in the cache. Whenever NW is set to 1, the i486 processor will not write to external memory if the data is in the cache. This means stale data can develop in the i486 CPU cache. This stale data will not be written to external memory if NW is later set to 0 or that cache line is later overwritten as a result of a cache miss. In general, the cache should be flushed when disabled.

在设置CD和NW时，可以通过使用测试寄存器加载数据来冻结高速缓存中的数据.这对于为时间紧迫的中断代码和数据提供有保证的高速缓存命中很有用.

It is possible to freeze data in the cache by loading it using test registers while CD and NW are set. This is useful to provide guaranteed cache hits for time critical interrupt code and data.

请注意，所有段均应以16个字节为边界开始，以允许程序对齐高速缓存行中的代码/数据.

Note that all segments should start on 16 byte boundaries to allow programs to align code/data in cache lines.

用法示例

coreboot的幻灯片平台展示了其CAR的实现方式 ，它描述了上述过程. invd指令在幻灯片21上使用.

Examples of Usage

coreboot has a slide-deck presenting their implementation of CAR, which describes the above procedure. The invd instruction is used on Slide 21.

AMD在§2.3中将其称为通用缓存.3:在引导过程中将L2缓存用作常规存储.

在某些情况下，由于 DMA(直接内存访问)硬件而导致缓存不一致性，invd也可能会有用.

In certain situations involving cache-incoherency due to DMA (Direct Memory Access) hardware, invd might also prove useful.

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