是否可以在RAM中执行一些计算? [英] Is it possible to perform some computations within the RAM?
问题描述
从理论上讲，是否有任何方法可以使用与内存相关的指令(例如move，clflush或诸如此类，例如在相邻两行之间的xor)在RAM中执行任何计算?
由于我对RAM和汇编的了解有限，所以我想不出任何这种可能性.
否，任何计算都在CPU(或GPU或其他可以加载/存储到RAM的系统设备)中完成.甚至连@PaulR链接到的完整的mov内容评论只是使用CPU的地址生成硬件和寄存器中的数据进行计算.
当CPU发生高速缓存未命中时，内存仍然只看到64B突发加载和64B突发存储.
另请参见 每个程序员应了解的内存 了解有关DDR协议工作原理的一些背景信息(发送地址，然后向/从RAM传输数据突发)
lock inc [mem]实际上是在CPU内部实现的，它具有使CPU使系统中所有其他可能的观察者(例如其他CPU内核和PCIe设备) look 成为原子的加载/修改/存储的功能. .但是不包括将逻辑分析仪连接到内存总线之类的东西，它不尊重CPU内核在执行原子的read-modify-write时用于持有对缓存行的专有权的缓存一致性协议./p>
有些人认为添加是在内存芯片内部"完成的，但它们是错误的. DRAM芯片(或将其连接到DDR4总线的接口芯片)中没有加法器，甚至没有布尔AND/OR/XOR硬件.它所能做的就是从给定地址加载或存储.可以做得更多的芯片不只是DRAM.
很明显，内存接口芯片中有逻辑，但是并没有连接到数据上.
如果确实如此，它将是计算RAM 的一种. (感谢在评论中进行链接，顺便说一句.有趣的计算机体系结构构想.AFAIK，但是，没有主流CPU或GPU使用C-RAM.)
您甚至不能要求DDR4 DRAM将页面归零. CPU必须通过内存控制器执行此操作.
Theoretically, is there any way to perform any computations within the RAM, using memory related instructions such as move, clflush or whatever, such as an xor between two adjacent rows for example?
With my limited knowledge about RAM and assembly, I can't think of any such possibilities.
No, any computation is done in the CPU (or GPU, or other system devices that can load/store to RAM). Even the Turing-complete mov stuff that @PaulR linked in a comment is just using the CPU's address-generation hardware with data in registers to do calculations.
The memory still just sees 64B burst-loads and 64B burst-stores when the CPU has cache misses.
See also What Every Programmer Should Know About Memory for some background on how the DDR protocol works (send address, then transfer a burst of data to/from the RAM)
Related: is num++ atomic in C, or with x86 inc [mem]?
lock inc [mem] is actually implemented inside the CPU with a load/modify/store that the CPU makes look atomic to all possible other observers in the system (e.g. other CPU cores, and PCIe devices). But not including stuff like hooking up a logic analyzer to the memory bus, which doesn't respect the cache-coherency protocol that a CPU core uses to hold exclusive rights to a cache line while it's doing the atomic read-modify-write.
Some people thought that the add is done "inside" the memory chips, but they are mistaken. There is no adder, or even boolean AND/OR/XOR hardware in a DRAM chip (or in the interface chips that connect it to a DDR4 bus); all it can do is load or store from a given address. Any chip that can do more than that is not just DRAM.
Well obviously there's logic in the memory interface chips, but it isn't hooked up to operate on the data.
If it did have that, it would be a type of Computational RAM. (Thanks linking that in comments, BTW. Interesting computer-architecture idea. AFAIK, no mainstream CPU or GPUs use C-RAM, though.)
You can't even ask DDR4 DRAM to zero a page for you. The CPU has to do that through the memory controllers.
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