字大小及其指示 [英] Word Sizes and It's Indications

问题描述

请在下面看到一个有关各种指令集体系结构中字长及其与汇编语言的关系的问题.感谢您提供的所有帮助.

Please see below a question regarding word sizes in various instruction set architectures, and how that ties to assembly languages. Thank you for any and all help.

首先是一些事实(如果其中任何一个错误，请纠正我).处理器体系结构的字长表示(其中一些错误，请参见下面的Seva帖子):

First a few facts (please correct me if any of these are wrong). The word size of a processor architecture indicates ( Some of these were wrong, please see Seva's post below):

1. 每个寄存器的最大大小
2. 每个内存地址的最大大小(可以寻址的内存量)
3. CPU可以在一条指令中处理的最大整数
4. 可以通过一次操作在工作存储器之间来回传输的最大数据

现在出现了一件非常奇怪的事情:在IA-32的汇编语言中，单词被指定为16位长. IA-32是指所有支持32位计算的x86版本(即该字应为32位长).

Now here comes the really strange thing: In assembly language for IA-32 a word is specified to be 16 bit long. IA-32 refers to all x86 versions that supports 32-bit computing (i.e. word is supposed to be 32 bit long).

这只会使我对单词及其所表示的(上面的列表)的理解全部消失.

That just makes my whole understanding of words and what it indicates (list above) fall apart.

感谢您帮助我深入浅出

马格努斯

请在下面查看x86体系结构上的两个有用链接.

1. 如以下altie所述: http://en.wikibooks.org/wiki/X86_Assembly/X86_Architecture
2. 我偶然发现了一个简单的x86指南: http://www.swansontec.com/sintel.html

1. As posted by altie below: http://en.wikibooks.org/wiki/X86_Assembly/X86_Architecture
2. A simple x86 guide I stumbled accross: http://www.swansontec.com/sintel.html

推荐答案

所有这些假设都有反例.

All of those assumptions have counterexamples.

每条指令的大小

The size of each instruction

英特尔x86自古以来就具有可变长度指令.在Thumb-2模式下，ARM也是如此.

Intel x86 had variable length instructions since forever ago. So does ARM when in Thumb-2 mode.

每个寄存器的最大大小

The largest size of each register

您的意思是-整数个寄存器，对不对?例如，Intel上的浮点寄存器的长度为10个字节.这是最接近的.但是Intel x86是一个明显的例外-在16位CPU时，它对"word"的定义是固定的.随着ISA的发展，定义陷入了僵局.

You mean - integer registers, right? Floating point registers on Intel are, for example, 10 bytes long. This one is the closest. But Intel x86 is a notable exception - its definition of "word" was fixed at the time of 16-bit CPUs; as the ISA moved on, the definition stuck.

同样，在ARM的AArch64指令集的上下文中，字"表示"32位"，而通用寄存器是64位.自从ARM的32位全盛时期以来，"word"的定义就固定下来了.

Similarly, in the context of the ARM's AArch64 instruction set, "word" means "32 bits" while the general purpose registers are 64-bit. The definition of "word" was fixed in ARM's 32-bit heyday and stayed since.

每个内存地址的最大大小

The largest size of each memory address

显然是错误的. 16位Intel 286具有24位地址空间.这是通过内存管理单元(MMU)执行的-寄存器中的用户级地址与进入内存子系统的物理地址不同.与最近的Intel CPU上的PAE相同.在过去，Intel x86的线性20位地址由16位段和偏移量组成.

Clearly wrong. 16-bit Intel 286 had a 24-bit address space. This is performed via a memory management unit (MMU) - the user-level address in a register is not the same as the physical address that goes into the memory subsystem. Same with PAE on recent Intel CPUs. In olden days, Intel x86 had its linear 20-bit address made out of 16-bit segment and offset.

CPU可以在一条指令中处理的最大整数

The largest integer the CPU can process in a single instruction

这是接近的-但是同样，例外.这里和那里都有两个注册命令. MIPS具有hi:lo-一对专用的32位寄存器，可以充当单个64位寄存器.英特尔具有在xDX:xAX对上运行的命令.而且不要让我开始使用SIMD.

This one is close - but again, with exceptions. There are two-register commands here and there. MIPS has hi:lo - a dedicated pair of 32-bit registers that may act as a single 64-bit one. Intel has commands that operate on xDX:xAX pair. And don't get me started on SIMD.

可以通过一次操作在工作存储器之间来回传输的最大数据段

Largest piece of data that can be transferred to and from the working memory in a single operation

ARM具有加载多个"和存储多个"命令，一次最多可以存储16个寄存器.英特尔具有PUSHA/POPA.在物理级别上，内存总线也有所不同.

ARM has "load multiple" and "store multiple" commands that can store up to 16 registers in one go. Intel has PUSHA/POPA. On the physical level, memory buses vary, too.

一个肮脏的小真理是，在出现在书本和使用它的汇编程序的上下文之外，没有一个单词的真实定义.在Intel上，"word"从远古时代就一直代表16位的块.随着CPU变为32位和64位，它们保留了定义，现在我们谈论的是DWORD和QWORD.现代64位Intel CPU上的寄存器为QWORD大小. Windows API不再严格地不再是Intel，它诞生于16位Intel，并且仍然保留数据类型.在Windows.h中，WORD定义为无符号短(2个字节)，并且它们无法更改，这将破坏结构布局，因此二进制格式对所有人无处不在.

The dirty little truth is that there's no single true definition of word outside of the context of a book it appears in and the assembler that uses it. On Intel, "word" used to denote a 16-bit chunk from times immemorial; as the CPUs became 32-bit and 64-bit, they've retained the definition, now we're talking about DWORDs and QWORDS. The registers on modern 64-bit Intel CPUs are QWORD-sized. Windows API, which is not strictly Intel any longer, was born on 16-bit Intel and still retains the datatypes. WORD is defined in windows.h to be unsigned short (2 bytes), and they can't change it ever - that'd break struct layouts, therefore binary formats, for everyone everywhere.

另一方面，在ARM上，即使在AArch64指令集的上下文中，字"也表示32位.因此，有一些汇编命令(例如"load half-word")可与16位操作数一起使用.因此，当在ARM上的Windows(即Windows Phone，Windows RT，Windows CE/Mobile)的C语言中进行汇编时，并为它们进行汇编时，必须记住两个不同的定义.幸运的是，鉴于模棱两可，没有人会以语言来思考-至少在没有将真实面目留在脑海中的情况下.同样，ARM的汇编语言强烈鼓励您尽可能多地使用32位值，并在必要时提升16位变量.因此，甚至函数的16位参数也作为32位寄存器在内部传递.

On ARM, on the other hand, "word" denotes 32 bits, even in the context of the AArch64 instruction set. So there are assembly commands like "load half-word" that work with 16 bit operands. So when coding in C for Windows on ARM (i. e. Windows Phone, Windows RT, Windows CE/Mobile) and in assembly for the same, you have to keep in mind two different definitions. Fortunately, given the ambiguity, no one thinks in terms of words - at least not without keeping the real size in the back of one's mind. Also, ARM's assembly language strongly encourages working with 32-bit values as much as you can, promoting 16-bit variables when necessary. So even 16-bit parameters to functions are internally passed as 32-bit registers.

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