IBM的lis和ori指令如何工作? [英] How do IBMs lis and ori instructions work?
lis
在此处定义(<a href ="http://www-01.ibm.com/support/knowledgecenter/api/content/nl/en-us/ssw_aix_53/com.ibm.aix.aixassem/doc/alangref/fixed_point_load.htm#idx175"rel =" nofollow noreferrer> http://www-01.ibm.com/support/knowledgecenter/api/内容/nl/zh-CN/ssw_aix_53/com.ibm.aix.aixassem/doc/alangref/fixed_point_load.htm#idx175 )
扩展助记符
lis rx, value
=>等效于addis rx, 0, value
. aka加载立即移位
然后
addis
定义为:
根据级联偏移量和基地址计算地址,并将结果加载到通用寄存器中.
本页上描述了立即加载移位"操作( http://www.ibm.com/developerworks/library/l-ppc/):
方便地,lis(意味着立即加载负载")将直接加载到GPR的高16位中.然后,剩下要做的就是添加低位.
所以lis r1, 0x0028
是addis r1, 0, 0x0028
,用英语:将寄存器r1
的内容的高16位设置为0x0028. (将其他位清零,因为我们在0
中添加了0x28 << 16
.)
我认为ori
的定义很简单:
对通用寄存器内容的低16位与16位无符号整数进行逻辑或运算,并将结果存储在另一个通用寄存器中.
在您的示例中,ori r1, r1, 0x776F
:
英语:获取寄存器r1
中的低16位,然后将它们与0x776F(1110111 01101111
)进行或,然后将其存储回r1
中.
因此,这两个指令在寄存器r1
中形成0x0028776F
,而与先前的内容无关.
addis
之后的低16位为零,因此对它们进行或"运算只是将它们设置为ori
的立即数.
addi
或ori
设置低位)是RISC ISA典型的构造任意32位常量的方法.一个32位指令字不能容纳整个32位立即数.I want to know how do lis
and ori
instructions work? There is a description IBM description which i cannot understand well. Could someone explain to me what is the result on this example:
lis r1, 0x0028
ori r1, r1, 0x776F
lis
is defined here ( http://www-01.ibm.com/support/knowledgecenter/api/content/nl/en-us/ssw_aix_53/com.ibm.aix.aixassem/doc/alangref/fixed_point_load.htm#idx175 )
Extended Mnemonic
lis rx, value
=> Equivalent toaddis rx, 0, value
. aka Load Immediate Shifted
addis
is then defined as:
Calculates an address from a concatenated offset and a base address and loads the result in a general-purpose register.
The "Load Immediate Shifted" operation is described on this page ( http://www.ibm.com/developerworks/library/l-ppc/ ):
Conveniently, lis (meaning "load immediate shifted") will load directly into the high 16 bits of the GPR. Then all that's left to do is add in the lower bits.
So lis r1, 0x0028
is addis r1, 0, 0x0028
, in English: Set the upper 16 bits of the contents of register r1
to 0x0028. (And zero the other bits, because we added 0x28 << 16
to 0
.)
I think ori
's definition is straight-forward:
Logically ORs the lower 16 bits of the contents of a general-purpose register with a 16-bit unsigned integer and stores the result in another general-purpose register.
In your example, ori r1, r1, 0x776F
:
In English: Get the lower 16-bits of whatever is in register r1
and OR them with 0x776F ( 1110111 01101111
) then store it back in r1
.
So those two instructions form 0x0028776F
in register r1
, with no dependency on the previous contents.
The low 16 bits are zero after addis
, so ORing into them just sets them to ori
's immediate.
A 2-instruction sequence like this (special instruction to set high bits, then addi
or ori
to set the low bits) is typical of RISC ISAs for constructing arbitrary 32-bit constants; a 32-bit instruction word doesn't have room for a whole 32-bit immediate.
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