回写与直写式缓存？ [英] Write-back vs Write-Through caching?

问题描述

我的理解是，这两种方法之间的主要区别在于，在直写方法中，数据会立即通过高速缓存写入主内存，而在写回中，数据将在较后时间写入。

My understanding is that the main difference between the two methods is that in "write-through" method data is written to the main memory through the cache immediately, while in "write-back" data is written in a "latter time".

我们仍然需要在延迟时间内等待内存，因此直写的好处是什么？

We still need to wait for the memory in "latter time" so What is the benefit of "write-through"?

推荐答案

直写到主内存的好处是它简化了计算机系统的设计。通过直写，主存储器始终具有该行的最新副本。因此，当读取完成后，主存储器始终可以使用请求的数据进行回复。

The benefit of write-through to main memory is that it simplifies the design of the computer system. With write-through, the main memory always has an up-to-date copy of the line. So when a read is done, main memory can always reply with the requested data.

如果使用回写功能，则有时最新数据位于文件中。处理器缓存，有时它位于主内存中。如果数据在处理器缓存中，则该处理器必须停止主内存回复读请求，因为主内存可能具有该数据的陈旧副本。

If write-back is used, sometimes the up-to-date data is in a processor cache, and sometimes it is in main memory. If the data is in a processor cache, then that processor must stop main memory from replying to the read request, because the main memory might have a stale copy of the data. This is more complicated than write-through.

此外，直写可以简化缓存一致性协议，因为它不需要修改州。 Modify 状态记录了缓存必须先写回缓存行，然后才能使该行无效或逐出该行。通过高速缓存写操作总是可以使无效的行而无需回写，因为内存已经拥有该行的最新副本。

Also, write-through can simplify the cache coherency protocol because it doesn't need the Modify state. The Modify state records that the cache must write back the cache line before it invalidates or evicts the line. In write-through a cache line can always be invalidated without writing back since memory already has an up-to-date copy of the line.

另外一件事-写入内存映射的I / O寄存器的回写体系结构软件必须采取额外的步骤，以确保立即将写入发送出缓存。否则，直到该行被另一个处理器读取或驱逐该行，否则在内核外部看不到写入。

One more thing - on a write-back architecture software that writes to memory-mapped I/O registers must take extra steps to make sure that writes are immediately sent out of the cache. Otherwise writes are not visible outside the core until the line is read by another processor or the line is evicted.

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