计划计数器的增量无效 [英] Program Counter's Increment Won't Work
问题描述
一切正常,但增量功能有效。它可以从0递增到1,从1递增到2,然后从2递增到 1111111111。
Everything works but the increment function. It can increment from 0 to 1, 1 to 2, and then from 2 it goes to "1111111111". I'm stumped.
变量:
D_IN:数据输入
PC_OE:高电平有效。驱动PC_TRI输出。
PC_OE: Active high. Drives PC_TRI output.
PC_LD:高电平有效将D_IN加载到PC中。
PC_LD: Active high synchronously loads D_IN into PC.
PC_INC:高电平有效同步递增
PC_INC: Active high synchronously increments value in PC.
RST:有效的高异步复位。
RST: Active high asyncronous reset.
PC_COUNT:PC中的当前值。地址。
PC_COUNT: Current value in PC. Address.
PC_TRI:PC在三态控制下的当前值。当PC_OE = 1时,PC_TRI <=
PC_COUNT,否则为高阻抗。
PC_TRI: Current value in the PC under tri-state control. When PC_OE = '1', PC_TRI <= PC_COUNT, else high impedance.
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
entity ProgramCounter is
Port ( D_IN : in STD_LOGIC_VECTOR (9 downto 0);
PC_OE : in STD_LOGIC;
PC_LD : in STD_LOGIC;
PC_INC : in STD_LOGIC;
RST : in STD_LOGIC;
CLK : in STD_LOGIC;
PC_COUNT : out STD_LOGIC_VECTOR (9 downto 0);
PC_TRI : out STD_LOGIC_VECTOR (9 downto 0));
end ProgramCounter;
architecture Behavioral of ProgramCounter is
signal s_COUNT : STD_LOGIC_VECTOR (9 downto 0);
begin
s_COUNT <= "0000000000";
proc: process(RST, CLK, PC_LD, D_IN, s_COUNT, PC_INC, PC_OE)
begin
if (RST = '1') then
s_COUNT <= "0000000000";
elsif (rising_edge(CLK)) then
if (PC_LD = '1') then
s_COUNT <= D_IN;
elsif (PC_INC = '1') then
s_COUNT <= s_COUNT + 1;
else
end if;
else
end if;
if (PC_OE = '1') then
PC_TRI <= s_COUNT;
else
PC_TRI <= "ZZZZZZZZZZ";
end if;
PC_COUNT <= s_COUNT;
end process proc;
end Behavioral;
推荐答案
QuantumRipple的注释非常有用
The comment of QuantumRipple is very useful
begin
--s_COUNT <= "0000000000";
...
我试图评论这样的行,并且行得通。
尝试执行此操作,并在开始计数之前进行RST
I tried to comment such line and it worked. Try to do this, and make RST before start to count
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