英特尔芯片组-GPIO编程 [英] Intel chipset - GPIO programming

问题描述

根据规范，我知道以下信息：

From the spec, I knew the following information:

JGPIO1 PIN# :10

SoC GPIO # : 71 

USE select: IO 0x532[7] ( 0 = native function, 1 = GPIO )

IO select: IO 0x536[7] (0 = output, 1 = input )

Level: IO 0x540[7] ( 0 = low, 1= high )

在这种情况下，我想对GPIO引脚＃10进行编程。是否可以参考任何示例或示例代码？

In this case, I want to program GPIO pin # 10. Is there any example or sample code I can refer to ?

I可以通过RW-everything [1] 做到。但是，这是在Windows中。

I can do this thorugh RW-everything [1]. However, this is in Windows.

我想在C和linux环境中这样做。

I want to do this in C and in linux environment.

请劝告。

=================================== =============================

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例如，如果我想设置

第7位为0x532

第7位为0x536

在0x540处第7位为1。

The 7th bit to 1 at 0x540.

推荐答案

在Linux用户空间中，通常使用的方法通过 / sys 伪文件系统（也称为sysfs）访问GPIO。这提供了一个可移植的接口，该接口试图最大程度地减少硬件依赖性并避免与设备驱动程序发生冲突。

In Linux userspace the typical method used to access GPIOs is the through the /sys pseudo-filesystem (aka sysfs). This offers a somewhat-portable interface that tries to minimize hardware dependencies and avoid conflicts with device drivers.

要确定要在板上访问的GPIO编号，您必须咨询您的SoC文档。 / sys / class / gpio / 中的目录名称需要与其对应的硬件寄存器一起识别。这些目录名称的格式为 gpiochip N，其中N表示该寄存器中的基本GPIO编号。文件 gpiochipN / label 应该有助于识别寄存器，例如

To determine the GPIO numbers that you want to access on your board, you will have to consult your SoC documentation. The directory names in /sys/class/gpio/ need to be identified with their hardware register counterparts. These directory names will have the form gpiochipN, where N is for the base GPIO number in that register. The file gpiochipN/label should help identify the register, e.g. by its (memory or port) address.

请注意，N不能以0开头。IntelBayTrail系统的第一个目录可能具有 gpiochip82 ，因此最低编号的GPIO为82。应将寄存器的位数添加到基数中以获得GPIO编号。

Note that N may not start with 0. An Intel BayTrail system might have gpiochip82 as its first directory, so the lowest-numbered GPIO would be 82. The bit number of the register should be added to the base number to obtain the GPIO number.

请参考用于正式文档的Documentation / gpio / sysfs.txt 。

我可以通过RW-一切 1 。但是，这是在Windows中。

I can do this thorugh RW-everything 1. However, this is in Windows.

可以编写类似的程序在Linux下执行。但是，Linux程序（与以x86为中心的Windows不同）应该可以移植到其他体系结构，因此这种需要了解底层硬件详细信息的程序几乎不可能编写/维护。设备驱动程序的一个目的是隔离/模块化此类硬件详细信息，并且该程序正试图规避那些驱动程序！

A similar program could probably be written to execute under Linux. However Linux programs (unlike Windows which is x86-centric) should be portable to other architectures, so such a program that needs to know low-level hardware details is near-impossible to write/maintain. One purpose of device drivers is to isolate/modularize such HW details, and such a program is trying to circumvent those drivers!

另外，使用该程序可能会使系统不稳定或出现故障。在正在运行的系统上，对内存和/或设备寄存器进行处理是不安全的。 FWIW我编写了一个实用程序，该实用程序报告一个特定SoC的引脚配置，但是仅读取寄存器，并且从不修改任何设置。

Additionally using such a program could make a system unstable or malfunction. Mucking around memory and/or device registers is unsafe on a running system. FWIW I have written a utility that reports the configuration of the pins for one specific SoC, but that only reads the registers and never modifies any setting.

请注意，大多数SoC文档（以及Linux）都将引脚控制/配置视为与GPIO分开的子系统（但如果没有重叠，则密切相关）。引脚控制/配置通常包括：

Note that most SoC documentation (as well as Linux) treat pin control/configuration as a separate (but closely related if not overlapping) subsystem to GPIOs. Pin control/configuration typically includes:

• 针对不同的外设/功能复用引脚，


• 方向性（即输入或输出），


• 连接上拉或下拉电阻，


• 输入滤波（即去毛刺），


• 输出驱动器（例如漏极开路）和


• 中断控制。

• multiplexing the pin for different peripherals/functionality,
• directionality (i.e. input or output),
• connecting pull-up or pull-down resistors,
• input filtering (i.e. de-glitching),
• output drive (e.g. open drain), and
• interrupt control.

GPIO子系统通常处理：

The GPIO subsystem typically handles:

• 方向性，


• pin状态和


• 中断

请参阅 Documentation / pinctrl.txt 和 Documentation / gpio / gpio .txt 。

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