GNU Makefile中的后期变量扩展 [英] Late variable expansion in gnu Makefile

问题描述

我在Makefile配方中使用split命令分割了一个大文件.

I split a big file using the split command in a Makefile recipe.

trails : $(OBJ)
    sort -m $? | accumulate.py --threshold 30 | split -C 10MB -d -a 3 - trail.

然后我将结果文件重命名为具有.acc扩展名.想法是稍后在此扩展上应用隐式规则.

I then rename the resulting files to have the .acc extension. The idea is to have an implicit rule applied on this extension later.

我面临的问题是变量扩展发生在生成.acc文件之前.例如，以下规则不会产生任何结果:

The issue I face is that variable expansion happens before the .acc files are generated. For example the following rule doesn't produce anything:

all: $(wildcard *.acc) trails
    @echo $?

使用patsubst函数也不起作用，因为我事先不知道split将生成多少个输出文件.

Using the patsubst function doesn't work either because I don't know in advance how many output files split will generate.

PS.我分割文件以利用make并行执行作业的能力:例如make -j 16.

PS. I split the files to take advantage of the ability of make to parallel the jobs: make -j 16 for example.

推荐答案

您将必须使用递归make.在此makefile中执行拆分操作，然后调用递归make来处理其余部分.您的问题尚不完全清楚，但我认为您想要这样的东西:

You'll have to use recursive make. Perform the split operation in this makefile, then invoke a recursive make to handle the rest. Your question was not completely clear, but I think you want something like this:

all: trials
         $(MAKE) recurse

trials: $(OBJ)
         sort -m ...

recurse: $(wildcard *.acc)
         echo $?

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