x86 BSWAP指令REX不符合Intel规范吗? [英] x86 BSWAP instruction REX doesn't follow Intel specs?

问题描述

我一直在与NASM和GAS一起组装(和拆卸)BSWAP x64指令，并且都将 BSWAP r15 组装为 490FCF

I've been assembling (and disassembling) the BSWAP x64 instruction with both NASM and GAS, and both assemble the instruction BSWAP r15 as 490FCF in hex. Disassemblers also disassemble this to the same instruction.

指令( 49 )的REX前缀因此设置了REX.W位(位3)和REX.B位(位0).这直接与英特尔文档相反，该文档指出:

The REX prefix for the instruction (49) thus has the REX.W bit (bit 3) and the REX.B bit (bit 0) set. This is directly in contrast to the Intel documentation, which states:

在64位模式下，指令的默认操作大小为32位.使用REX.R许可形式的REX前缀访问其他寄存器(R8-R15).使用REX.W形式的REX前缀可将操作提升到64位.

In 64-bit mode, the instruction’s default operation size is 32 bits. Using a REX prefix in the form of REX.R permits access to additional registers (R8-R15). Using a REX prefix in the form of REX.W promotes operation to 64 bits.

(强调我的)

因此，根据文档，应设置REX.W位和REX.R位(第2位)，而不是REX.B，并设置编码为 4C0FCF >.

So according to the documentation, the REX.W bit and the REX.R bit (bit 2) should be set, not REX.B, giving the encoding 4C0FCF.

我的问题是，谁是正确的?汇编程序还是英特尔?

My question is, who is correct? The assemblers or Intel?

推荐答案

此处的手册有误.请参阅 2.2.1.2有关REX前缀字段的更多信息中的REX前缀说明，该消息表示:

The manual is wrong there. See the description of the REX prefix in section 2.2.1.2 More on REX Prefix Fields instead which says:

REX.B在ModR/M r/m字段或SIB基本字段中修改基数；或修改用于访问GPR的操作码reg字段.

REX.B either modifies the base in the ModR/M r/m field or SIB base field; or it modifies the opcode reg field used for accessing GPRs.

和图2-7.寄存器以操作码字节编码的操作数；雷克斯未使用的REX.R 如下:

BSWAP 使用一个操作码reg字段.

The BSWAP uses an opcode reg field.

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