如何关闭 MIPS-GCC 自动指令重新排序? [英] How to turn off MIPS-GCC automatic instruction reordering?

问题描述

按照这个问题:带有跳转的奇怪 MIPS 汇编器行为(和链接)指令 我有一个用于我的单周期 MIPS 项目的 GNU 汇编工具链(没有分支延迟槽！).不过，我真的更喜欢用 C 编写.从编译器生成的代码本身确实可以运行，但我每次都必须手动编辑汇编源代码，因为 GCC 出于某种原因喜欢自动重新排序分支指令本身.我不想用脚本来破解它来确定何时再次重新排序分支.

Following this question: Weird MIPS assembler behavior with jump (and link) instruction I have a working GNU assembly toolchain for my single cycle MIPS project (no branch delay slot!). I would really prefer to write in C though. The code itself generated from the compiler does run, but I have to manually edit the assembly source every time since GCC for some reason likes to automatically reorder the branching instructions itself. I don't want to hack this with a script to figure out when to reorder the branches back again.

有没有办法绕过这个?GCC 出于某种原因生成这样的代码:

Is there a possible way to circumvent this? GCC generates code like this for some reason:

.set noreorder
...
jr $ra <-- GCC reordered for me!
addi $v0, $v0, 10 <--
...
.set reorder

我真的想给汇编程序提供这样的东西:

where I really want to feed the assembler something like this:

.set noreorder
addi $v0, $v0, 10
jr $ra

推荐答案

我认为不可能将其关闭，因为所有 MIPS 变体中都存在延迟槽.我认为如果您在模拟器中实现延迟槽会好得多.这也将使它更接近真实的硬件.
除此之外，您可能可以修补 gcc 以停止尝试填充延迟槽.

I don't think it's possible to turn it off since delay slots are present in all MIPS variants. I think it's much better if you implement delay slots in your emulator. This will also make it closer to real hardware.
Barring that, you can probably patch gcc to stop trying to fill the delay slots.

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