SMP 调度如何在 Linux 内核中工作?(ARM架构) [英] How SMP schedule work in Linux kernel? (ARM architecture)

问题描述

在 linux 中，调度程序将在经过特定时间后触发.据我了解，计时器触发一个中断，进而触发对 schedule 的调用.

In linux, the scheduler will be triggered when a specific amount of time has passed. As I understood, the timer triggers an interrupt which in turn triggers a call to schedule.

在 SMP 系统中，我在了解 Linux 内核"一书中读到每个处理器都自行运行 scheduler() 函数".这是否意味着每个定时器中断都会同时触发每个 cpu 进行重新调度?

In a SMP system, I read in the book "Understanding the Linux Kernel" that "each processor runs the scheduler() function on its own". Does this mean every timer interrupt triggers every cpus to do a re-schedule at the same time?

推荐答案

ARM SMP 系统支持两种类型的中断.SPI(共享外设中断)和PPI(外设私有中断).PPI 是一个per-CPU 中断源.PPI 的 SMP 的一个特例是 SGI(软件生成的中断)；这是一个 CPU 到 CPU 中断，用于在 SMP 世界中从一个 CPU 向另一个 CPU 发出信号(称为 IPI).^注意1

The ARM SMP systems support two types of interrupts. SPI (shared peripheral interrupt) and PPI (peripheral private interrupts). The PPI is a per-CPU interrupt source. A special case for SMP of the PPI is an SGI (software generated interrupt); this is a CPU-to-CPU interrupt that is used to signal from one CPU to another in the SMP world (called IPI).^Note1

A PPI定时器可用于允许每个CPU使用'tickless调度'；即定时器中断是通过对未来时间事件的了解来安排的(谷歌时间轮，查看 NO_HZ 文档 等).当前的 Linux 内核不使用这个特定的 PPI 计时器进行调度.它仅用作延迟循环时间源.取而代之的是 全球 PPI使用定时器.这个定时器可以有选择地中断每个 CPU，但寄存器集对所有 CPU 都是全局的.一个特定的 CPU 可以为自己安排一个中断；时基是全球性的.

A PPI timer can be used to allow each CPU to use 'tickless scheduling'; that is timer interrupts are scheduled via knowledge of future time events (google timing wheel, look at the NO_HZ documentation, etc). The current Linux kernel doesn't use this specific PPI timer for scheduling. It is only used as a delay loop time source. Instead the Global PPI timer is used. This timer can interrupt each CPU selectively, but the register set is global to all CPUs. A particular CPU may schedule an interrupt for itself; with the time base being global.

复杂之处在于，任务必须从一个 CPU 迁移到另一个 CPU，以平衡 CPU 之间的工作.此外，Linux 内核的核心代码/调度程序是为多个 CPU(或架构)编写的，它们可能没有这些 per-CPU 中断源.确定的答案可能取决于您的内核版本和使用的调度程序(或更一般的内核配置).通常，一个繁忙的 CPU 会执行迁移，其他 CPU 可能会在计时器滴答时唤醒，只是为了查看它设置的任务是否应该运行(可能是一个迁移的进程).如果NO_HZ 生效，一些CPU 可能根本无法唤醒；在迁移的情况下，他们将获得 IPI.

The complication is that tasks must be migrated from one CPU to another in order to balance work among CPUs. Also, the Linux kernel's core code/scheduler is written for multiple CPUs (or architectures) and they may not have these per-CPU interrupt sources. An definitive answer may depend on your kernel version and the scheduler used (or more generally kernel configuration). Generally, a busy CPU will do the migration, other CPUs may wake on a timer tick just to see if a task in it's set should run (maybe a migrated process). If NO_HZ is in effect, some CPUs may not wake at all; they will get an IPI in the case of migration.

无论如何，除了时钟源之外，CPU 调度中没有任何 ARM 特定的内容.ARM SMP 系统可能没有全局 PPI 计时器.在这种情况下，每个 CPU 可能会唤醒以服务中断，但大多数 CPU 可能会立即休眠.由于错误的定时器/中断控制器设计或错误的系统配置，这可能发生在任何系统上.然而，即使在这些情况下，除非需要，否则代码不会调用调度程序.

In any case, there is nothing that is ARM specific in the CPU scheduling besides the clock source. It is possible for an ARM SMP system to not have the a global PPI timer. In this case, every CPU may wake to service an interrupt, but the majority may sleep immediately. This could happen on any system due to a bad timer/interrupt controller design or a bad system configuration. However, even in these cases, the code would not call into the scheduler except where needed.

请参阅:SMP 上的 Linux 调度程序(这可能是重复的，尽管答案不是很好的 IMO)，IBM 完全公平的调度程序文章和 O'Reillys Linux Kernel 调度器章节.

See: Linux Scheduler on SMP (which maybe a duplicate although the answer is not great IMO), IBMs completely fair scheduler article and O'Reillys Linux Kernel scheduler chapter.

注意1:这实际上是GIC(或通用中断控制器)术语.但是，大多数 ARM SMP 系统都使用此中断控制器.它与 Cortex-A CPU 捆绑在一起，并作为某些 ARMv6 系统的外部软组件出现.ARM SMP 系统可能会使用另一个控制器，但这种情况可能极为罕见或不存在.

Note1: This is actually GIC (or generic interrupt controller) terminology. However, most ARM SMP systems use this interrupt controller. It is bundled with Cortex-A CPUs and came as an external soft-component for some ARMv6 systems. It is possible for an ARM SMP systems to use another controller, but it is probably extremely rare or non-existent.

有两个 ARM 片上定时器；这些非常有用，因为与 SOC 供应商计时器相比，每个 Cortex-A 都有它们.其中之一用于延迟计数循环".这在中断的情况下效果更好.我认为理解 SMP 调度并不重要，您可能会忽略该评论，只知道该源文件不用于调度.这是我看的第一个.如果你觉得它真的让人分心，我会删除这些信息.

There are two ARM on-chip timers; these are useful as every Cortex-A has them compared to SOC vender timers. One of them is used instead of a 'counting loop' for a delay. This works better in the case of interrupts. I don't think it is critical to understand SMP scheduling, you may ignore that comment and just know that that source file is not used for scheduling. It was the first one I looked at. If you find it really distracting, I will remove that information.

参见这篇论文正时轮；它是关于'IP'/网络，但NO_HZ 的概念是相似的.IE.不要每 10 毫秒中断一次，只是为了增加滴答声.在NO_HZ 情况下，每个CPU 可以根据驱动程序和子系统发出的请求类型设置未来的唤醒时间.即，schedule_work() 需要在 175ms 内运行，然后定时器被设置为 CPU 的那个值，我们不会唤醒 17 次(如果系统滴答是 10ms)，但是只需将刻度增加 17.一些 CPU 可能需要超时来驱逐当前进程以运行另一个用于多任务处理，因此调度程序本身可能会设置一个计时器.

See this paper on timing wheels; it is about 'IP'/networking, but the concept of NO_HZ is similar. Ie. Don't interrupt every 10mS, just to increment ticks. In the NO_HZ case, each CPU can set a future wake-up time based on what sort of requests drivers and sub-systems have given. Ie, schedule_work() needs to be run in 175ms, then the timer is set to that value for the CPU and we don't wake-up 17 times (if the system tick is 10mS), but just increment ticks by 17. Some CPUs may need a timeout to evict the current process to run another for multi-tasking as well, so the scheduler itself may set a timer.

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