为什么ARM说“一个链接寄存器支持快速叶函数调用"? [英] Why does ARM say that "A link register supports fast leaf function calls"

问题描述

我最近接触到了链接寄存器和叶函数的概念.

I have came across the concepts of link register and leaf functions recently.

我从之前的 SO 读取中了解到，LR 告诉了代码之前在执行期间的位置.我还了解到叶函数是位于函数调用层次结构末尾的函数.

I understand from previous SO reads that the LR tells where the code was previously during execution. I also got to know that a leaf function is a function which comes at the end of the function call hierarchy.

ARM 维基百科页面说:

链接寄存器支持快速叶函数调用.

A link register supports fast leaf function calls.

为什么这个说法是真的?我看了ARMARM(架构参考手册)，关于链接寄存器的信息很少.

Why is this claim true? I looked at the ARMARM (Architecture Reference Manual), and the information on the link register is minimal.

推荐答案

在一些体系结构上(例如 x86、x86_64)，函数的返回地址总是存储在堆栈中，调用函数意味着访问主内存:

On some architectures (such as x86, x86_64), the return address of a function is always stored on the stack and calling a function implies accessing the main memory:

• 调用时写入堆栈；

• a write to the stack when calling;

返回时从堆栈中读取.

相比之下，如果您的架构/ABI 可以在不使用主存的情况下跳转/返回，并且被调用者的参数和返回值也可以在寄存器中传递，那么叶函数的调用和返回可以不使用涉及 RAM.

In contrast, if your architecture/ABI can jump/return without using the main memory and the parameters and return values of the callee can be passed in registers as well, the call and return to/from leaf functions can be done without involving RAM.

如果leaf函数足够简单，它可能会在根本不接触RAM的情况下执行:

If the leaf function is simple enough, it might execute without touching RAM at all:

int callee(int a, int b)
{
  return a + b;
}

int caller(int a, int b, int c, int d)
{
  return callee(a,b) + calle(c,d);
}

给出(每个函数由 clang -target arm-eabi -S -o- -O3 单独编译):

gives (each function compiled separately by clang -target arm-eabi -S -o- -O3):

callee:
  add   r0, r1, r0
  bx    lr
caller:
  .save {r4, r5, r6, r10, r11, lr}
  push  {r4, r5, r6, r10, r11, lr}
  .setfp    r11, sp, #16
  add   r11, sp, #16
  mov   r4, r3
  mov   r5, r2
  bl    callee
  mov   r6, r0
  mov   r0, r5
  mov   r1, r4
  bl    callee
  add   r0, r0, r6
  pop   {r4, r5, r6, r10, r11, lr}
  bx    lr

注意我们如何避免访问 caller 和 calee 内核中的内存.

Notice how we can avoid accessing the memory in the core of caller and in calee.

这篇关于为什么ARM说“一个链接寄存器支持快速叶函数调用"?的文章就介绍到这了，希望我们推荐的答案对大家有所帮助，也希望大家多多支持IT屋！