0xFFFFFFF0H 处的软件初始化代码 [英] Software initialization code at 0xFFFFFFF0H

问题描述

英特尔表示，复位后处理器处于实模式，软件初始化代码从 0xFFFFFFF0H 开始.我的问题:

Intel says after reset the processor is placed in real mode and the software initialization code starts at 0xFFFFFFF0H. My questions:

• 如果处理器处于实模式，它如何访问内存 > 1MB (0xFFFFFFF0H)

• If processor is in real-mode how can it acess the memory > 1MB (0xFFFFFFF0H)

这是如何发生的，或者当 RAM 在 < 时会发生什么?4GB(比如 2GB)

How this happens or what happens when RAM in < 4GB ( say 2GB)

如果 BIOS 在 0x000FFFFFH 映射，为什么处理器会在 0xFFFFFFF0H 开始执行

If the BIOS is mapped at 0x000FFFFFH why processor starts executing at 0xFFFFFFF0H

请帮我解决这些问题.谢谢.

Please help me with these questions. Thanks.

推荐答案

我终于在Coreboot文档中找到了答案:

只要 x86 CPU 在复位后唤醒，它就会在实模式下进行.此模式仅限于 1MiB 地址空间和 64k 偏移量，原始 8086/88 的复位向量位于 0xFFFF0.

Whenever an x86 CPU wakes up after reset, it does it in Real Mode. This mode is limited to 1MiB address space and 64k offsets and the reset vector of the original 8086/88 was located at 0xFFFF0.

即使我们运行像 P3 这样的当前处理器也没有任何变化，这些较新的 CPU 也感觉它们在重置后从 0xF000:0xFFF0 开始.但他们没有.复位后代码段寄存器的基址为 0xFFFF0000，因此 CPU 生成一个 0xFFFFFFF0 的物理地址给芯片组.芯片组负责将此区域转发到引导 ROM.令人困惑:CPU思考".它在 0xF000:0xFFF0 处运行代码，但它使用 0xFFFFFFF0 处的代码.开发人员在将这种设计实现到硅片中时一定已经气馁了.

As there was no change even if we run current processors like P3, these newer CPUs also feels like they where start at 0xF000:0xFFF0 after a reset. But they do not. The base of the code segment register is 0xFFFF0000 after reset, so the CPU generates a physical address of 0xFFFFFFF0 to the chipset. And the chipset is responsible to forward this area to the boot ROM. Its confusing: The CPU "thinks" it runs code at 0xF000:0xFFF0 but instead it uses code at 0xFFFFFFF0. The developers must have been tanked up when they realised this design into silicon.

因此，英特尔文档似乎谈到了在线"使用的物理地址，即在访问真实总线时.这与 CPU 模式无关(总线不知道也不关心 CPU 模式，翻译这些东西是 CPU 的职责).

So it seems the Intel documentation talks about the physical address as used "on the wire", i.e. when accessing the real bus. And this is independent of the CPU mode (the bus doesn't know or care about a CPU mode, it's the CPUs duty to translate these things).

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