在 Linux-CentOS/Intel 机器上评估 SMI(系统管理中断)延迟 [英] Evaluating SMI (System Management Interrupt) latency on Linux-CentOS/Intel machine
问题描述
我有兴趣在运行 CentOS 并用于(非常)软实时应用程序的 Linux 机器上评估 SMI 处理的行为(延迟、频率).
I am interested in evaluating the behavior (latency, frequency) of SMI handling on Linux machine running CentOS and used for a (very) soft real time application.
推荐使用哪些工具(CentOS 的 hwlatdetect?)，最好的做法是什么?
What tools are recommended (hwlatdetect for CentOS?), and what is the best course of action to go about this?
如果 CentOS 没有可用的好工具，我是否正确假设安装一个由于底层硬件/bios相同，同一台机器上的不同操作系统应该产生相同的结果?
If no good tools are available for CentOS, am I correct to assume that installing a different OS on the same machine should yield the same results since the underlying hardware/bios are the same?
这些参数是否有大致数据来源.
Is there any source for ballpark figures on these parameters.
机器为X86_64架构，运行CentOS 6.4(内核2.6.32-358.23.2.el2.centos.plus.x86_64.)
The machines are X86_64 architecture, running CentOS 6.4 (kernel 2.6.32-358.23.2.el2.centos.plus.x86_64.)
推荐答案
正常运行期间肯定会发生 SMI.我的家用台式机每隔半秒就有一个芯片组驱动的 SMI，它在芯片组中启用.由于 BIOS 驱动的 CPU 频率缩放方案，我还看到一些服务器每秒运行两次.但是，某些系统可以运行很长时间而不会发生 SMI，因此这真的取决于.
SMIs can certainly happen during normal operation. My home desktop has a chipset-driven SMI every second and a half which is enabled in the chipset. I've also seen some servers that have them twice a second due to a BIOS-driven CPU frequency scaling scheme. However, some systems can go long periods of time without an SMI occurring so it really depends.
问题 #1:hwlatdetect 是一种检测系统上发生的 SMI 延迟的选项.BIOSBITS 是另一种选择，它是一张可引导 CD，可以识别是否正在发生 SMI.您还可以通过创建一个在循环中旋转并获取时间戳(使用 RDTSC)的内核模块来编写自己的测试.如果您看到两个时间戳读数之间的间隔很长，您可以查询 CPU MSR 0x34 以查看 SMI 计数器是否增加，这表明发生了 SMI.
Question #1: hwlatdetect is one option to detect the latency of SMIs occurring on your system. BIOSBITS is another option which is a bootable CD that can identify if SMIs are occuring. You can also write your own test by creating a kernel module that spins in a loop and takes timestamps (using RDTSC). If you see a long gap between two timestamp readings, you could consult CPU MSR 0x34 to see if the SMI counter incremented which would indicate that an SMI happened.
如果你想生成一个 SMI，你可以制作一个内核模块，对端口 0xb2 执行 OUT CPU 指令，例如将值 0 写入此端口.(您还可以通过在写入端口 0xB2 之前和之后收集时间戳来计时此 SMI).
If you want to generate an SMI, you can make a kernel module that does an OUT CPU instruction to port 0xb2, e.g. write a value of 0 to this port. (You can also time this SMI by gathering a timestamp just before and just after the write to port 0xB2).
问题 #2，SMI 在操作系统下方运行，因此您选择的操作系统不应该有任何影响.
Question #2, SMIs operate at a layer below the OS so which OS you choose, shouldn't have any impact.
问题 #3:BIOSBITS 建议将 SMI 延迟保持在 150 微秒以下.
Question #3: BIOSBITS recommends that SMI latencies be kept under 150 microseconds.
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