在makefile中使用多个源文件扩展名 [英] Working with multiple source file extensions in a makefile
问题描述
我想使用如/ p>
vpath%.c $(SRC)
%.o:%.c
$(COMPILER)$(FLAGS)$< $(INCFLAG)$(INC)
这当然可以工作,如果我知道源文件将是形式为%.c,但是在多个可能的文件扩展名的情况下,我还需要为%.cpp和%.cc创建一个类似的规则。当然,三个规则并不是一件很大的事情,但是,即使使用不同的语言,也可以使用这个makefile作为任何项目的拖放,而无需重新编写规则就很好。 / p>
那么如何编写一个规则(或其他一些完成相同目标的结构),如下所示:
SRC_EXT = cpp c cc
vpath%。$(SRC_EXT)$(SRC)
%.o:%。$(SRC_EXT)
$(COMPILER)$(FLAGS)$< $(INCFLAG)$(INC)
感谢您的帮助。
你不能在标准的POSIX make中。但是,由于你提到vpath,我会假设你使用GNU make。如果您有一个足够新的版本(3.81或更高版本),您可以轻松完成调用和eval:
SRC_EXT = cpp c cc
define compile_rule
%.o:%。$ 1
$$(COMPILER)$$(FLAGS)$$& $$(INCFLAG)$$(INC)
endef
$(foreach EXT,$(SRC_EXT),$(eval $(call compile_rule,$(EXT))))
如果您没有足够的新GNU make,或者更喜欢替代解决方案,则可以对生成的makefile执行相同的操作。
I have a c++ project with various extensions for the source files (.cpp, .c, .cc) and various extensions for the header files (.hpp, .h, .hh). The source files are located in a directory called SRC, and the header files are predictably in a directory called INC.
I would like to compile the source with a rule like
vpath %.c $(SRC)
%.o: %.c
$(COMPILER) $(FLAGS) $< $(INCFLAG)$(INC)
This of course works if I know the source file will be of the form %.c, but in the case of multiple possible file extensions, I would need to build a similar rule for %.cpp and %.cc as well. Of course three rules isn't a big deal to write, but it would be nice to be able to use this makefile as a drag and drop for any project, even in a different language, without having to re-write the rules.
So how can I write a rule (or some other construct that accomplishes the same goal) that works like:
SRC_EXT = cpp c cc
vpath %.$(SRC_EXT) $(SRC)
%.o: %.$(SRC_EXT)
$(COMPILER) $(FLAGS) $< $(INCFLAG)$(INC)
Thanks for your help.
You can't in standard POSIX make. However since you mention vpath I'll assume you're using GNU make. If you have a sufficiently new version (3.81 or newer), you can do this easily enough with call and eval:
SRC_EXT = cpp c cc
define compile_rule
%.o : %.$1
$$(COMPILER) $$(FLAGS) $$< $$(INCFLAG)$$(INC)
endef
$(foreach EXT,$(SRC_EXT),$(eval $(call compile_rule,$(EXT))))
If you don't have sufficiently new GNU make, or would prefer an alternate solution, you can do the same thing with generated makefiles.
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