允许GCC makefile的目标空间 [英] Allow space in target of GCC makefile

问题描述

在使用make.exe时，有没有办法在目标名称中使用空格？如果这个真正古老的错误报告是正确的，这似乎是不可能的：
http：// savannah。

为了便于参考，最大的问题是makefile命令如下：

 foo bar baz：$（OBJ）
 $（CPP）$（LINKOBJ）-o $（BIN）$（LIBS）
  

...似乎被视为三个单独的命令：一个构建foo（注意包含的），一个建立酒吧，最后一个建立巴兹（再次，包括）。这是因为make.exe似乎使用空格作为分隔符。

然而，假设有人可能想要构建Hello World.exe是合理的。这似乎不可能。双引号不起作用，也不会逃避单独的单词（我读过某处，不记得链接）：

 foo \\ bar \\ baz：$（OBJ）
 $（CPP）$（LINKOBJ）-o $（BIN）$（LIBS）
  

是否有其他解决方法？官方手册只确认了按空格标记的东西，但没有提供将空间用于任何其他目的的方法：
http://www.gnu.org/software/make/manual/make.html#Rule-Syntax

编辑：按照建议，我也尝试过使用单斜杠，但这些与双斜杠具有完全相同的效果。请抱怨它无法找到第一个字的规则：

  mingw32-make.exe：***没有规则可以使目标`foo'，由'all'需要。停止。 
  

虽然可执行文件foo bar baz.exe正确生成，但每次执行链接字。

解决方案

正如马蒂亚斯所说，这是一个\的问题，但也是双引号。这是我如何成功地进入这个领域：

  EXECUTABLE = foo\ bar\ baz 
 all：$（SOURCES ）$（EXECUTABLE）
 $（EXECUTABLE）：$（OBJECTS）
 $（CC）$（OBJECTS）-o$ @$（LDFLAGS）
  

请注意$ @
周围的双引号在我看来，当达到目标$（EXECUTABLE）时，它会扩展\，所以命令行成为

  gcc file.o -o foo bar baz -LFlags 
  

这不是您想要的，您需要在文件名称周围添加双引号。

现在你在windows上，我不记得它是如何处理名称中的空格的，所以正如Matthias所说，首先检查cmd.exe如何处理空格（除了用双引号括起名称...）

Is there a way to get spaces inside target names working when using make.exe? It seems to be impossible if this really ancient bug report is correct: http://savannah.gnu.org/bugs/?712

For reference, the big problem is that pieces of makefile commands like:

"foo bar baz": $(OBJ)
    $(CPP) $(LINKOBJ) -o $(BIN) $(LIBS)

... seem to get treated as three separate commands: one to build "foo (note the included "), one to build bar, and lastly, one to build baz" (again, including "). This is because make.exe seems to be using space as a delimiter.

However, it's reasonable to assume that one might want to build "Hello World.exe" for example. This doesn't seem to be possible. Double quotes don't work, and neither does escaping the separate words (I've read that somewhere, don't remember the link):

"foo\\ bar\\ baz": $(OBJ)
    $(CPP) $(LINKOBJ) -o $(BIN) $(LIBS)

Is there any other way to fix this? The official manual only confirms the tokenize-by-spaces stuff, but doesn't provide a way to use space for any other purpose: http://www.gnu.org/software/make/manual/make.html#Rule-Syntax

Edit: as suggested, I've tried single slashes too, but these have the exact same effect as double slashes. Make complains it can't find rules for the first word:

mingw32-make.exe: *** No rule to make target `foo', needed by `all'.  Stop.

The executable "foo bar baz.exe" is correctly produced though, but linking is done each time per word.

解决方案

as Matthias said, it's a matter of "\ ", but of double quote too. Here is how I succeded into this :

EXECUTABLE=foo\ bar\ baz
all: $(SOURCES) $(EXECUTABLE)
$(EXECUTABLE): $(OBJECTS)
                $(CC) $(OBJECTS) -o "$@" $(LDFLAGS)

Note the double quotes around the $@ It seems to me that when make reach the target "$(EXECUTABLE)" it expands the "\ ", so the command line becomes

gcc file.o -o foo bar baz -LFlags

which is not what you want, you want double quotes around the name of the file.

Now you are on windows and I don't remember how it deals with spaces in names, so as Matthias said, first check how "cmd.exe" deals with spaces (except by surrounding name with double quotes...)

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