我如何从GCC命令行指定包含文件？ [英] How can I specify an include file from the GCC Command Line?

问题描述

在Windows下使用GCC，我希望能够在gcc命令行（或手动管理的makefile）上指定要包含在正在编译的文件中的特定包含文件的名称。正如我所看到的，理想情况下，源代码文件将包含类似... ...的行......

  #include INCLUDEFILENAME 
 
 code> 

...那么在gcc命令行中指定的文件名将替代 INCLUDEFILENAME



看来我可以通过在gcc命令行中使用 -D 选项（例如 -D INCLUDEFILENAME =C：\TestLib\Test1.h），但是当文件名文本被替换为 #include 语句不包含在双引号中，如果没有这些语句，它不会被识别为要包含的文件。当然......

  #includeINCLUDEFILENAME
  

...不起作用，因为INCLUDEFILENAME会变成一个字符串，并且不会被宏值取代。我尝试了其他方式来指定双引号（ \x22 ， \，\等），但这些似乎不适用于 #include 行。

我知道gcc -include 选项，它似乎可以强制将文件包含在内，而不会在源代码中以任何方式提及文件，但我更喜欢源文件表明包含文件将被包含在这里，但它的名称被指定为源文件（最终来自makefile）的外部。

有关我如何实现此目的的任何建议，我们将不胜感激。

解决方案

您可以使用丑陋但经典的字符串化技巧：

<$ p $ x $＃$＃$ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ c>

Using GCC under Windows, I would like to be able to specify on the gcc command line (or from a manually managed makefile) the name of a specific include file to be included in the file being compiled. As I see it, ideally the source code file would contain a line something like…

#include INCLUDEFILENAME 

…then a filename specified on the gcc command line would be substituted for the INCLUDEFILENAME text.

It seems I can get close to achieving this by defining a macro called INCLUDEFILENAME on the gcc command line using the -D option (eg. -D INCLUDEFILENAME="C:\TestLib\Test1.h") but when the filename text gets substituted into the #include statement it is not enclosed in double quotes, and without these it is not recognized as a file to be included. Of course…

#include "INCLUDEFILENAME" 

…doesn’t work as INCLUDEFILENAME then becomes a string literal and does not get replaced by the macro value. I have tried other ways of specifying the double quotes (\x22, \", "\"", etc) but these don’t seem to work on the #include line.

I am aware of the gcc -include option which it seems can force a file to be included without it being mentioned in any way in the source file, but I would prefer that the source file indicates that an include file is to be included here but that it’s name is specified "externally" to the source file (ultimately, from the makefile).

Any suggestions on how I can achieve this would be appreciated.

解决方案

You can use the ugly but classic stringification trick:

#define STRINGIFY2(x) #x
#define STRINGIFY(x) STRINGIFY2(x)
#include STRINGIFY(INCLUDEFILENAME)

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