Makefile在规则中只执行一次echo [英] Makefile execute echo only one time inside a rule

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本文介绍了Makefile在规则中只执行一次echo的处理方法,对大家解决问题具有一定的参考价值,需要的朋友们下面随着小编来一起学习吧!

问题描述

我有这个Makefile

I have this Makefile

$(MAIN) : $(OBJECTS)

$(OBJECTS) : %.c
     compile file

我想用 printf 用于打印文件需要编译时编译的内容,如果在每次编译结束时编译文件,则完成,例如:

And i want to use printf for print something like "compiling" whenever a file needs compile and "done" if a file has been compiled at the end of every compiled for example:

Compiling
file1.c
file2.c
file3.c
Done

我试图在shell或如果这样的句子> ifeq 来自makefile
但是我需要一个变量和makefile不允许我更改一个变量的值,如果我不知道为什么。我如何存档?

I have tried to use sentences like if from shell or ifeq from makefile but i need a variable and makefile doesn't let me change the value of a variable inside of a if i don't know why. How can i archive this?

推荐答案

我解决了变量的问题 MODE 初始化为0并将我的makefile分成两部分,一部分检查某些内容是否已被修改,在这种情况下更改失败我打印我的消息然后执行 $(MAKE)MODE = 1 其中我执行更新所需内容的普通makefile

I solved the problem making a variable MODE initialized to 0 and dividing my makefile in two parts one part check if something has been modified where in that case instead o update the fails i print my messages and then do $(MAKE) MODE=1 where i perform a normal makefile that update everything needed

感谢Renauld Pacalet提出的问题https://stackoverflow.com/a/51100086/10010027

Thanks to Renauld Pacalet in the question https://stackoverflow.com/a/51100086/10010027

这篇关于Makefile在规则中只执行一次echo的文章就介绍到这了,希望我们推荐的答案对大家有所帮助,也希望大家多多支持IT屋!

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