VHDL _ TO_INTEGER [英] VHDL _ TO_INTEGER

问题描述

我对VHDL中的问题感到困惑.

I'm confused about a problem I have in VHDL.

我做一个VGA_display_ characters，所以我想用to_integer无符号将一些std_logic_vectors转换成整数，然后我想恢复健康， 这样，我无法同时使用这些库.

I make one VGA_display_ characters, so I wanna convert some std_logic_vectors into integer by to_integer unsigned, then I wanna recuperate, in this way I can't use those libraries in the same time.

ieee.std_logic_arith.all和ieee.numeric_std.all quartus给出的错误:

ieee.std_logic_arith.all and ieee.numeric_std.all The error given by quartus:

(错误(10621):接口.vhd(34)上的VHDL使用子句错误:多个使用子句"导入了一个简单名称为"unsigned"的声明-这些声明都不是直接可见的 错误(10784):syn_arit.vhd(26)的HDL错误:请参见对象未签名"的声明 我的代码如下:

(Error (10621): VHDL Use Clause error at interface.vhd(34): more than one Use Clause imports a declaration of simple name "unsigned" -- none of the declarations are directly visible Error (10784): HDL error at syn_arit.vhd(26): see declaration for object "unsigned" bellow my code :

to_integer

conv_std_logic_vector

推荐答案

我的建议是:不要使用ieee.std_logic_arith.它是专有的(不是VHDL的正式组成部分)，并且引起的问题远远超过其解决的问题.

My advice is: don't use ieee.std_logic_arith. It's proprietary (not officially part of VHDL) and causes far, far more problems than it solves.

仅使用numeric_std，您就可以做所需的一切:

Use only numeric_std and you can do everything you need:

to_integer(unsigned(X))和to_integer(signed(X))，其中X是std_logic_vector.

要向另一个方向转换:

std_logic_vector(to_unsigned(K, N))和std_logic_vector(to_signed(K, N))，其中K是要转换的整数，N是位数.

std_logic_vector(to_unsigned(K, N)) and std_logic_vector(to_signed(K, N)) where K is the integer to convert and N is the number of bits.

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