VHDL-IF替代 [英] VHDL - IF alternative

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本文介绍了VHDL-IF替代的处理方法,对大家解决问题具有一定的参考价值,需要的朋友们下面随着小编来一起学习吧!

问题描述

我想写一个if的替代方法,下面是if语句.

I want write an alternative of the if, I have following if statement.

if val1(1)&val1(0) < val2(1)&val2(0) then
            r:="10";
    else
            if  val1(1)&val1(0) = val2(1)&val2(0) then
                r:="00";
            else 
                r:="01";
            end if;
    end if;

我希望它更改为以下内容.

And I want it to change to following.

s:=((data1(9)&data1(8)) < (data2(9)&data2(8)))?"01":(((data1(9)&data1(8)) = (data2(9)&data2(8)))?"00":"01");

但是编译器给我以下错误.

But the compiler gives me following error.

#错误:COMP96_0015:最小值:(111,49):';'预期."

"# Error: COMP96_0015: min: (111, 49): ';' expected."

我该如何解决?谢谢.

推荐答案

问题:val1和val2是什么类型?

Question: what's the type of val1 and val2?

以下是一些改进:

  • 如果val1和val2只有2位:val1 < val2
  • 使用切片而不是单个concats:val1(1 downto 0) < val2(1 downto 0)
  • 您可以使用y <= a when (condition) else b;陈述
    这是VHDL,等效于C的三元运算符y = cond ? val1 : val2;
  • 您可以定义一个if-then-else函数,我们将其称为ite:

  • if val1 and val2 have only 2 bits: val1 < val2
  • use slices instead of single bit concats: val1(1 downto 0) < val2(1 downto 0)
  • you could use the y <= a when (condition) else b;statement
    this is the VHDL equivalent to C's ternary operator y = cond ? val1 : val2;
  • you could define a if-then-else functions let's call it ite:

function ite(cond : boolean; val1 : std_logic_vector; val2 : std_logic_vector)
return std_logic_vector is
begin
  if cond then
    return val1;
  else
    return val2;
  end if;
end function;

用法:

s := ite((val1(1 downto 0) < val2(1 downto 0)), "10",    -- less
     ite((val1(1 downto 0) = val2(1 downto 0)), "00",    -- equal
                                                "01"));  -- greater

  • 您可以定义一个比较函数,我们称之为comp:

    function comp(val1 : std_logic_vector; val2 : std_logic_vector)
    return std_logic_vector is
    begin
      if (val1 < val2) then
        return "10";
      elsif (val1 = val2) then
        return "00";
      else
        return "01";
      end if;
    end function
    

    用法:

    s := comp(val1(1 downto 0), val2(1 downto 0));
    

  • 这篇关于VHDL-IF替代的文章就介绍到这了,希望我们推荐的答案对大家有所帮助,也希望大家多多支持IT屋!

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