从处理器角度看流程调度 [英] Process Scheduling from Processor point of view
问题描述
我知道调度是由内核完成的.让我们假设一个 Linux中的进程(P1)当前正在处理器上执行. 由于当前过程对时间片一无所知 并且内核当前未在处理器上执行，内核如何计划下一个要执行的进程?
I understand that the scheduling is done by the kernel. Let us suppose a process (P1) in Linux is currently executing on the processor. Since the current process doesn't know anything about the time slice and the kernel is currently not executing on the processor, how does the kernel schedule the next process to execute?
是否存在某种中断来告知处理器切换以执行内核或任何其他机制?
Is there some kind of interrupt to tell the processor to switch to execute the kernel or any other mechanism for the purpose?
推荐答案
简而言之，这是一个中断，它将控制权交给了内核.该中断可能由于任何原因出现. 大多数情况下，内核会由于计时器中断而获得控制权，否则按键中断可能会唤醒内核. 中断通知外围系统或几乎任何会改变系统状态的事物的IO完成 唤醒内核.
In brief, it is an interrupt which gives control back to the kernel. The interrupt may appear due to any reason. Most of the times the kernel gets control due to timer interrupt, or a key-press interrupt might wake-up the kernel. Interrupt informing completion of IO with peripheral systems or virtually anything that changes the system state may wake-up the kernel.
有关中断的更多信息:
这样的中断分为上半部分和下半部分.下半部分用于延迟中断上下文的工作.
Interrupts as such are divided into top-half and bottom half. Bottom Halves are for deferring work from interrupt context.
上半部:在禁用中断的情况下运行，因此应该超快，通常尽快放弃CPU
Top-half: runs with interrupts disabled hence should be superfast, relinquish the CPU as soon as possible, usually
1) stores interrupt state flag and disables the interrupts(reset
some pin on the processor),
2) communicates with the hardware, stores state information,
delegates remaining responsibility to bottom-half,
3) restores the interrupt state flag and enables the interrupt((set
some pin on the processor).
下半部分:处理启用了中断的延迟工作(上半部分的委托工作)，因此可能需要一段时间才能完成.
Bottom-half: Handles the deferred work(delegated work by the top-half) runs with interrupts enabled hence may take a while before completion.
使用两种机制来实现下半处理.
Two mechanisms are used to implement bottom-half processing.
1) Tasklets
2) Work queues
.
If timer is the interrupt to switch back to kernel, is the interrupt a hardware interrupt???
在我们讨论的背景下，感兴趣的定时器中断是硬件定时器中断
The timer interrupt of interest under our context of discussion is the hardware timer interrupt,
在内核内部，计时器中断一词可能表示(取决于体系结构的)硬件计时器中断或软件计时器中断.
Inside kernel, the word timer interrupt may either mean (architecture-dependent) hardware timer interrupts or software timer interrupts.
Read this for a brief overview.
有关
记住计时器"是一个高级主题，很难理解.
Remeber "Timers" are an advanced topic, difficult to comprehend.
该中断是硬件中断吗???如果是硬件 中断，计时器的频率是多少?
is the interrupt a hardware interrupt??? if it is a hardware interrupt, what is the frequency of the timer?
if the interval of the timer is shorter than time slice, will kernel give the CPU back the same process, which was running early?
例如，这取决于许多因素:正在使用的Sheduler，系统上的负载，过程优先级以及诸如此类的事情. 最受欢迎的 CFS 并不完全取决于根据抢占时间的概念！ CFS选择的下一个合适的过程将获取CPU时间.
It depends upon many factors for ex: the sheduler being used, load on the system, process priorities, things like that. The most popular CFS doesn't really depend upon the notion of time slice for preemption! The next suitable process as picked up by CFS will get the CPU time.
计时器滴答，时间片和上下文切换之间的关系并不是那么简单.
The relation between timer ticks, time-slice and context switching is not so straight-forward.
每个进程都有自己的(动态计算的)时间片.内核会跟踪进程使用的时间片.
Each process has its own (dynamically calculated) time slice. The kernel keeps track of the time slice used by the process.
在SMP上，特定于CPU的活动(例如监视当前运行的进程的执行时间)由本地APIC计时器引发的中断来完成. 本地APIC计时器仅向其处理器发送中断.
On SMP, the CPU specific activities such as monitoring the execution time of the currently running process is done by the interrupts raised by the local APIC timer. The local APIC timer sends an interrupt only to its processor.
但是，默认时间段是在中定义的include/linux/sched/rt.h
However, the default time slice is defined in include/linux/sched/rt.h
阅读此.
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