如何以编程方式禁用硬件预取? [英] How do I programmatically disable hardware prefetching?

问题描述

我想以编程方式禁用硬件预取.

I would like to programmatically disable hardware prefetching.

来自

From Optimizing Application Performance on Intel® Core™ Microarchitecture Using Hardware-Implemented Prefetchers and How to Choose between Hardware and Software Prefetch on 32-Bit Intel® Architecture, I need to update the MSR to disable hardware prefetching.

这是一个相关的代码段:

Here is a relevant snippet:

"DPL预取和L2流预取设置也可以通过编程方式更改 通过编写设备驱动程序实用程序来更改IA32_MISC_ENABLE中的位 寄存器– MSR 0x1A0.这样的实用程序提供了启用或禁用预取的功能 机制，无需任何服务器停机时间.

"DPL Prefetch and L2 Streaming Prefetch settings can also be changed programmatically by writing a device driver utility for changing the bits in the IA32_MISC_ENABLE register – MSR 0x1A0. Such a utility offers the ability to enable or disable prefetch mechanisms without requiring any server downtime.

下表显示了IA32_MISC_ENABLE MSR中必须更改的位，以控制DPL和L2流预取:

The table below shows the bits in the IA32_MISC_ENABLE MSR that have to be changed in order to control the DPL and L2 Streaming Prefetch:

Prefetcher Type MSR (0x1A0) Bit Value 
DPL (Hardware Prefetch) Bit 9 0 = Enable 1 = Disable 
L2 Streamer (Adjacent Cache Line Prefetch) Bit 19 0 = Enable 1 = Disable"

我尝试使用 http://etallen.com/msr.html ，但这没有用. 我也尝试直接在asm/msr.h中使用wrmsr，但是存在segfaults. 我尝试在内核模块中执行此操作……并杀死了计算机.

I tried using http://etallen.com/msr.html but this did not work. I also tried using wrmsr in asm/msr.h directly but that segfaults. I tried doing this in a kernel module ... and killed the machine.

BTW-我正在使用内核2.6.18-92.el5，它在内核中链接了MSR:

BTW - I am using kernel 2.6.18-92.el5 and it has MSR linked in the kernel:

$ grep -i msr /boot/config-$(uname -r)
CONFIG_X86_MSR=y
...

推荐答案

摘自Intel参考:
该指令必须在特权级别0或实地址模式下执行；否则，将生成一般保护异常#GP(0).在ECX中指定保留的或未实现的MSR地址也会导致一般保护异常.

...
应该使用CPUID指令来确定是否支持MSR(EDX [5] = 1) 在使用此说明之前.

因此，您的故障可能与不支持MSR或使用错误MSR地址的CPU有关.

在内核源代码中有许多使用MSR的示例:

在内核源代码中，对于单个cpu，它演示了在arch/i386/kernel/cpu/intel.c中通过以下功能禁用Xeon的预取:

静态void __cpuinit Intel_errata_workarounds(struct cpuinfo_x86 * c)

rdmsr函数参数是msr号，指向低32位字的指针和指向高32位字的指针.
wrmsr函数参数是msr号，低32位字值和高32位字值.

多核或smp系统必须将cpu结构作为第一个参数传递:
void rdmsr_on_cpu(unsigned int cpu，u32 msr_no，u32 * l，u32 * h);
void wrmsr_on_cpu(unsigned int cpu，u32 msr_no，u32 l，u32 h);

From the Intel reference:
This instruction must be executed at privilege level 0 or in real-address mode; otherwise, a general protection exception #GP(0) will be generated. Specifying a reserved or unimplemented MSR address in ECX will also cause a general protection exception.

...
The CPUID instruction should be used to determine whether MSRs are supported (EDX[5]=1) before using this instruction.

So, your fault might be related to a cpu that doesn't support MSRs or using the wrong MSR address.

There are lots of examples of using the MSRs in the kernel source:

In the kernel source, for a single cpu, it demonstrates disabling prefetch for the Xeon in arch/i386/kernel/cpu/intel.c, in the function:

static void __cpuinit Intel_errata_workarounds(struct cpuinfo_x86 *c)

The rdmsr function arguments are the msr number, a pointer to the low 32 bit word, and a pointer to the high 32 bit word.
The wrmsr function arguments are the msr number, the low 32 bit word value, and the high 32 bit word value.

multi-core or smp systems have to pass the cpu struct in as the first argument:
void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);

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