Corei3中的硬件预取 [英] Hardware prefetching in corei3
问题描述
corei3是否支持通过硬件预取器进行硬件预取？如果是，我如何启用/禁用它？
Does corei3 support hardware prefetching through hardware prefetcher? If yes, how do I enable/disable it?
推荐答案
Intel Core i3处理器肯定支持硬件预取，尽管Intel的文档倾向于在细节上非常虚弱。品牌名称 Core i3既指基于 Nehalem的处理器，又指基于 Sandy Bridge的处理器，因此您必须检查特定的型号以知道要处理的是哪个处理器。
Intel Core i3 processors definitely support hardware prefetching, though Intel's documentation tends to be very weak on details. The brand name "Core i3" refers to both "Nehalem" based and "Sandy Bridge" based processors, so you have to check the specific model number to know which one you are dealing with.
为了使事情变得更复杂，较新的Intel处理器（Nehalem / Westmere / Sandy Bridge）具有几个不同的硬件预取器-英特尔体系结构软件开发人员手册第3B卷（出版物253669）中至少提到了三个。表30-25 MSR_OFFCORE_RSP_x请求类型字段定义中提到 DCU预取和 L2预取器。附录A-2的表A-2中也提到了这些内容，该表描述了Core i7，i5和i3处理器的性能计数器事件。表A-2中的事件4EH提到同时存在 L1流媒体和基于IP（IPP）的硬件预取器。附录A.4表A-6中相应的条目（针对事件4EH）还有更多关于此主题的词语，该条目描述了Westmere处理器的性能计数器。
To make things more complicated, newer Intel processors (Nehalem/Westmere/Sandy Bridge) have several different hardware prefetchers -- at least three are mentioned in the Intel Architecture Software Developer's Manual, Volume 3B (publication 253669). Table 30-25 "MSR_OFFCORE_RSP_x Request Type Field Definition" mentions "DCU prefetch" and "L2 prefetchers". These are also mentioned in Appendix A-2, Table A-2, which describes the performance counter events for Core i7, i5, and i3 processors. Event 4EH in Table A-2 mentions that there are both "L1 streamer and IP-Based (IPP) HW prefetchers". There are a few more words on this topic in the corresponding entry (for event 4EH) in Appendix A.4, Table A-6, which describes the performance counters for Westmere processors.
同一文档中的附录B-2，表B-3讨论了Intel Core Microarchitecture的MSR（特定于模型的寄存器），但看起来其中许多都可以移植到较新的版本中。寄存器1A0h显示有4位控制预取行为：
Appendix B-2, Table B-3 in the same document discusses the MSRs (Model Specific Registers) for the Intel Core Microarchitecture, but it looks like many of these carry over into newer versions. Register 1A0h shows that 4 bits control prefetching behavior:
- 位9：禁用硬件预取器
- 位19：禁用相邻缓存行预取
- 位37：DCU Prefetcher禁用
- 位39：IP Prefetcher禁用
- Bit 9: Hardware Prefetcher Disable
- Bit 19: Adjacent Cache Line Prefetch Disable
- Bit 37: DCU Prefetcher Disable
- Bit 39: IP Prefetcher Disable
启用和禁用预取器的工具在以下内容中进行了讨论：
如何以编程方式禁用硬件预取？
Tools to enable and disable prefetchers are discussed in: How do I programmatically disable hardware prefetching?
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