ARM特定的IRQ初始化 [英] ARM specific IRQ initialization

问题描述

我正在尝试了解针对ARM的体系结构特定的IRQ初始化(向量表和第一级中断哈希器).

I am trying to understand architecture specific IRQ initialization(vector table and first level interrupt hadlers) for ARM.

我检查了start_kernel() init/main.c -----> setup_arch() arch/arm/kernel/setup.c,，但找不到与IRQ初始化有关的源.我认为在start_kernel()内部调用的init_IRQ()是为了建立内核IRQ处理基础结构.

I checked start_kernel() init/main.c -----> setup_arch() arch/arm/kernel/setup.c, but couldn't find the source related to IRQ initialization. I think init_IRQ() which called inside start_kernel() is to set up kernel IRQ handling infrastructure.

我指的是3.14内核.您能否帮助理解ARM特定的IRQ初始化(ARM GIC initialization).我将CortexA15的内核称为3.14.

I am refering 3.14 kernel. Can you help to understand ARM specific IRQ initialization(ARM GIC initialization).I am refering 3.14 kernel for CortexA15.

推荐答案

由于某些代码是通过 section magic 调用的，而其他代码是通过回调和其他机制调用的，因此很难跟踪.此外，我们还有历史性的机制和设备树初始化 ^Note1 .

This is difficult to track as some code is called through section magic and others via call backs and other mechanisms. Also, we have historic mechanisms and device tree initialization^Note1.

在 imx6sl_init_irq()通过DT_MACHINE_START宏从计算机描述中调用irqchip_init() ，该宏是 .arch.info.init 部分中的rel ="nofollow"> machine_desc .该代码在启动时就很早就被调用，这是使IRQ硬件正常工作所必需的.它通常包括时钟机制.

There is a call back in init_irq of the machine structure; these are typically defined in a board file. For example, imx6sl_init_irq() calls irqchip_init() from the machine description via the DT_MACHINE_START macro which is a machine_desc in the .arch.info.init section. This code is called very early in boot and is required to get the IRQ hardware working; it typically include clocking mechanisms.

Linux支持多个 irqchip 控制器.例如，在某些ARM系统上，有多个GIC芯片.如果中断源超过〜1020，则需要这样做.同样，GPIO硬件通常是一种辅助IRQ芯片，用于启用/禁用GPIO中断.

Linux supports several irqchip controllers. For instance, on some ARM systems there are multiple GIC chips. This is needed if there are more than ~1020 interrupt sources. As well, the GPIO hardware is often a sort of secondary IRQ chip that enables/disables GPIO interrupts.

机器必须在设备树中声明GIC.这与 of_irq_init() 初始化具有硬件地址和中断编号的GIC控制器.即，这需要irq-gic驱动程序，并提供了一个具体的设备 ^Note2 .

A machine must declare the GIC in a device tree. This is matched versus a table entry in irq-gic.c which calls gic_of_init(). The tables are use by the of_irq_init() to initialize a GIC controller with hardware addresses and interrupt numbering. Ie, this takes the irq-gic driver and gives a concrete device^Note2.

所以现在您在start_kernel()中找到的代码称为

So now the code you found in start_kernel(), which calls init_IRQ() should make sense? It will look like,

 start_kernel     ->
  init_IRQ        ->
   machine_desc->init_irq (machine version)
    irqchip_init  ->
     of_irq_init  -> via *device tree* for address data
      gic_of_init -> actual controller initialization.

结构遍布整个地方，因为Linux是作为子系统组织的，因此您具有驱动程序基础结构(都需要中断)，设备树(获取数据)，初始化和中断代码(irqchip). DT或设备树功能旨在减少Linux中主板特定代码的数量.示例

The structure is all over the place because Linux is organized as sub-systems, so you have driver infrastructure (all need interrupts), device tree (to get the data), initialization and interrupt code (irqchip). The DT or device tree functionality is aimed at reducing the amount of board specific code in Linux. An example imx6 solo-lite device tree include shows how the data is coded. This text gets compiled to a flattened device tree binary which is passed from a boot loader (or attached to the image).

注1::设备树由多个名称调用.根据原始PowerPC规范， OF 用于开放式固件.作为 FDT 的扁平设备树"，主要由u-boot人员使用.也和 DT 一样.因此，当您看到以下前缀OF，DT，FDT之一时，通常是关于设备树"的.

Note 1: Device tree is called by several names. OF for open firmware as per the original PowerPC spec. As FDT for 'flattened device tree', mostly by u-boot people. Also as just DT. So when you see one of the following prefixes, OF, DT, FDT it is often about 'device tree'.

注意2::设备是具体的硬件.驱动程序是处理设备的代码. Linux分配内存并将其提供给驱动程序代码.这样，一段代码可以处理多个设备(在这种情况下为中断控制器).这是一个面向对象的概念，ARM将通过使用 address + offset 使用加载/存储单元来很好地处理它.

Note 2: A device is a concrete piece of hardware. A driver is the code to handle the device. Linux allocates memory and provides this to driver code. In this way one piece of code can handle multiple devices (interrupt controllers in this case). It is an object oriented concept and ARM will handle it well with address+offset use of the load/store unit.

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