传递C/C ++#定义到makefile [英] Passing C/C++ #defines to makefile

问题描述

我使用Eclipse IDE开发C/C ++. Eclipse还会生成一个我不想编辑的makefile，因为它将被覆盖.

I develop C/C++ using the Eclipse IDE. Eclipse also generates a makefile which I don't want to edit as it will simply be overwritten.

我想使用该makefile在哈德森内部进行每晚构建.

I want to use that makefile for nightly build within Hudson.

如何将IDE项目文件中的#define传递给makefile? (为什么Eclipse尚未将它们包含在生成的makefile中?)

How do I pass #defines which are made in the project file of the IDE to the makefile ? (and why doesn't Eclipse already include them in the generated makefile?)

我实际上已经弄清楚了一次，然后不小心覆盖了它:-(但是至少我知道可以做到...

I actually had this figured out once, then accidentally overwrote it :-( But at least I know that it can be done...

推荐答案

如果从命令行运行make，请使用

If you are running make from the command line, use

make CPPFLAGS=-DFOO

，这会将-DFOO添加到所有编译中.另请参阅制作手册中的CFLAGS，CXXFLAGS，LDFLAGS.

which will add -DFOO to all compilations. See also CFLAGS, CXXFLAGS, LDFLAGS in the make manual.

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