如何在Makefile中定义规则以仅编译已修改的* .cpp文件(及其依赖项),而不是所有* .cpp文件 [英] How to define rules in the Makefile to compile only that *.cpp files which was modified (and their dependencies), not all *.cpp files

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问题描述

让我说我有文件:

库:

  • one.cpp,one.h
  • two.cpp,two.h
  • three.cpp,three.h

程序:

  • program.cpp

有没有办法创建仅编译从上次编译中修改过的* .cpp的Makefile?

Is there way, to create Makefile which will compile only that *.cpp which were modified from last compilation?

目前我有类似的东西:

SRCS = one.cpp two.cpp three.cpp
OBJS = $(SRCS:.cpp=.o)

all: $(OBJS) program

.cpp.o:
    g++ -Wall -c $<

program:
    g++ -Wall $(OBJS) program.cpp -o program

clean:
    rm -f $(OBJS) program

我工作正常,但是当我编译程序然后更改two.cpp或two.h时,我首先需要运行"make clean",因为当我第二次运行"make"时,我会得到:

I works fine, but when I compile my program and then change two.cpp or two.h I need to run "make clean" first, because when I secondly run "make" I get:

Nothing to be done for 'all'.

我想以此方式更改我的Makefile,它将识别我的更改并重新编译该文件及其依赖项(如果one.cpp使用two.cpp中的代码进行了修改,则应重新编译两个文件).

I would like to change my Makefile in that way, it would recognize my changes and recompile that file and its dependencies (if one.cpp uses code from two.cpp which was modified, both files should be recompiled).

因此,如果我修改two.cpp,make应该这样做:

So if I modify two.cpp, make should do:

g++ -Wall -c two.cpp
g++ -Wall $(OBJS) program.cpp -o program

但是,如果one.cpp使用来自two.cpp的代码(已修改),请执行以下操作:

But if one.cpp uses code from two.cpp which was modified, make shold do:

g++ -Wall -c one.cpp
g++ -Wall -c two.cpp
g++ -Wall $(OBJS) program.cpp -o program

推荐答案

首先,我们创建可执行文件的目标文件先决条件.完成此操作后,只要其中一个SRCS发生更改,Make就会重新构建program,因此我们不需要OBJS作为显式目标:

First we make the object files prerequisites of the executable. Once this is done, Make will rebuild program whenever one of the SRCS changes, so we don't need OBJS as an explicit target:

all: program

program: $(OBJS)
  g++ -Wall $(OBJS) program.cpp -o program

然后我们将头文件作为对象的先决条件,因此,如果我们更改three.h,Make将重新生成Three.o:

Then we make the header files prerequisites of the objects, so that if we change three.h, Make will rebuild three.o:

$(OBJS): %.o : %.h

最后,由于one.cpp通过two.h使用two.cpp中的代码(我希望如此),所以我们将two.h作为one.o的先决条件:

And finally since one.cpp uses code from two.cpp by means of two.h (I hope), we make two.h a prerequisite of one.o:

one.o: two.h

为了使环境更清洁和易于维护,我们使用自动变量:

And to make things cleaner and easier to maintain we use automatic variables:

program: $(OBJS)
  g++ -Wall $^ program.cpp -o $@

将所有内容放在一起,我们得到:

SRCS = one.cpp two.cpp three.cpp
OBJS = $(SRCS:.cpp=.o)

all: program

$(OBJS): %.o : %.h

one.o: two.h

.cpp.o:
  g++ -Wall -c $<

program: $(OBJS)
  g++ -Wall $^ program.cpp -o $@

clean:
  rm -f $(OBJS) program

我们还可以做更多的事情(例如将program.o添加到OBJS),但这对于今天来说已经足够了.

There are a few more things we could do (like adding program.o to OBJS), but this is enough for today.

这篇关于如何在Makefile中定义规则以仅编译已修改的* .cpp文件(及其依赖项),而不是所有* .cpp文件的文章就介绍到这了,希望我们推荐的答案对大家有所帮助,也希望大家多多支持IT屋!

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