用makefile和静态模式规则进行树外构建 [英] Out of tree builds with makefiles and static pattern rules

问题描述

我正在研究一些在ARM上运行的裸机嵌入式代码，因此必须处理整个ARM与THUMB模式的区别.当前的构建系统使用静态模式规则来确定是以ARM还是THUMB模式编译文件.

$(ACOBJS) : %.o : %.c
    @echo
    $(CC) -c $(CFLAGS) $(AOPT) -I . $(IINCDIR) $< -o $@
$(TCOBJS) : %.o : %.c
    @echo
    $(CC) -c $(CFLAGS) $(TOPT) -I . $(IINCDIR) $< -o $@

其中ACOBJS是输出对象的列表，这些输出对象应处于ARM模式，而TCOBJS和Thumb模式则相同.这些列表是按照通常的方式从来源列表中创建的.

ACOBJS   = $(ACSRC:.c=.o)
TCOBJS   = $(TCSRC:.c=.o)

当前，这导致构建中的目标文件散布在源代码树上，这不是我特别希望的.我一直在尝试将其设置为非树状构建，但无法使其正常工作.我不一定非要全力以赴地进行树构建，但是我希望至少能够使用一个输出目录，所有中间文件最终都在该目录下运行.在这些限制条件下实现此目标的最佳策略是什么?

我正在考虑的一个选项是使用automake或整个autotools工具链来构建makefile.这似乎支持创建我想要的makefile类型，但似乎有点过头了.似乎是为便携式构建设计的自动工具与裸机嵌入式系统之间存在固有的阻抗失配，在这种情况下，主机元组之类的东西是由目标微控制器决定的.

解决方案

这有点老了，但我只是想做同样的事情，这是第一个Google命中.我认为值得分享另一种方法，因为如果您不使用自动工具，并且想用一个命令就可以在任何目录中构建目录，而后只是删除该目录，这两个答案都不方便.

这是一个Makefile的示例，该文件引用相对于包含Makefile的目录的文件.

MAKEFILE_DIR := $(shell dirname $(realpath $(lastword $(MAKEFILE_LIST))))
MFD := $(MAKEFILE_DIR)

CXX=g++
CXXFLAGS=-std=c++14 -Wall -Wextra -pedantic -c

test: test.o adjacency_pointers_graph.o
    $(CXX) $^ -o $@

%.o: $(MFD)/%.cpp $(MFD)/adjacency_pointers_graph.h
    $(CXX) $(CXXFLAGS) $< -o $@

然后进行某种源构建:

mkdir build
cd build
make -f ../Makefile

I'm working on some bare-metal embedded code that runs on ARM, and thus has to deal with the whole ARM vs. THUMB mode distinction. The current build system uses static pattern rules to determine whether to compile files in ARM or THUMB mode.

$(ACOBJS) : %.o : %.c
    @echo
    $(CC) -c $(CFLAGS) $(AOPT) -I . $(IINCDIR) $< -o $@
$(TCOBJS) : %.o : %.c
    @echo
    $(CC) -c $(CFLAGS) $(TOPT) -I . $(IINCDIR) $< -o $@

Where ACOBJS is a list of output objects that should be in ARM mode and the same for TCOBJS and Thumb mode. These lists are created from the list of sources in the usual manner of

ACOBJS   = $(ACSRC:.c=.o)
TCOBJS   = $(TCSRC:.c=.o)

Currently this results in the object files from the build being strewn about the source tree, which I don't particularly desire. I've been trying to set this up for out of tree builds but haven't been able to get this to work. I don't necessarily need to get full out of tree builds working, but I would like to at least be able to use an output directory under which all the intermediate files end up going. What is the best strategy to achieve this under these constraints?

One option I'm considering is using either automake or the whole autotools toolchain to build a makefile. This would seem to support creating the type of makefile I want, but seems like overkill. It also seems like there would be an inherent impedance mismatch between autotools, which is designed for portable builds, and bare-metal embedded systems, where things like host tuple are dictated by the target micro.

解决方案

This is a bit old but I was just trying to do the same thing this was the first google hit. I thought it was worth sharing another approach since neither answer is convenient if you're not using autotools and want to be able to build in any directory with a single command and later just blow away that directory.

Here's an example of a Makefile that refers to files relative to the directory containing the Makefile.

MAKEFILE_DIR := $(shell dirname $(realpath $(lastword $(MAKEFILE_LIST))))
MFD := $(MAKEFILE_DIR)

CXX=g++
CXXFLAGS=-std=c++14 -Wall -Wextra -pedantic -c

test: test.o adjacency_pointers_graph.o
    $(CXX) $^ -o $@

%.o: $(MFD)/%.cpp $(MFD)/adjacency_pointers_graph.h
    $(CXX) $(CXXFLAGS) $< -o $@

Then to do an sort of source build:

mkdir build
cd build
make -f ../Makefile

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