LDMIA指令在Cortex M4中的外部SRAM上无法正常工作 [英] LDMIA instruction not working correctly on external SRAM in cortex M4

问题描述

我在拇指模式下使用STM32L486ZG板.我正在运行一个没有任何RTOS的简单裸机应用程序.我已使用FSM将外部SRAM连接到板上.外部SRAM位于地址0x60000000.系统已初始化并以72MHz运行(我已尝试使用18-80 MHz的频率解决此问题)，现在在我的主要功能中，我具有以下代码:

I am using STM32L486ZG board in thumb mode. I am running a simple bare-metal application without any RTOS. I have external SRAM connected to the board using FSM. The external SRAM is located at address 0x60000000. The system is initialized and running at 72MHz (i have tried this issue with frequency from 18-80 MHz) now in my main function i have following code:

int main(){
    asm volatile (
            "push {r0}\n"
            "mov r0, #0x60000000\n"
            "add r0, #0x400\n"
            "stmdb r0!, {r1-r12}\n"
            "ldmia r0!, {r1-r12}\n"
            "pop {r0}\n"
            );
}

根据此代码，执行此主要功能后不应更改任何寄存器，但在执行以下指令后情况并非如此

According to this code no register should be changed after this main function has executed, but that's not the case after the following instruction

ldmia r0!, {r1-r12}

即执行后r9不正确. stmdb指令正常工作，但ldmia未正确加载数据.我已经通过查看内存中的内容来验证了这一点.

i.e. r9 is not correct after execution. stmdb instruction is working correctly but ldmia is not loading the data correctly. I have verified this by viewing the contents from memory.

此问题在ldmia指令中的所有参数中都始终存在:第9个寄存器始终会受到影响.

This issue is persistent with any arguments in the ldmia instruction: the 9th register is always affected.

说明: 可以说我正在调试此代码，下一条要执行的指令是:

Explanation: Lets say I am debugging this code and the next instruction to execute is this:

stmdb r0!, {r1-r12}

所有这些寄存器加高后，已经保存在内存中，并且r0的值为0x600003d0

after stepping up all these registers have been saved in the memory and value of r0 is 0x600003d0

内存内容:

0x600003D0  00000000 40021008 0000000C  .......@....
0x600003DC  40000000 00000000 00000000  ...@........
0x600003E8  20017FEC 00000000 00000000  ì.. ........
0x600003F4  00000000 00000000 00000000  ............

寄存器的内容:

r0  0x600003d0
r1  0x00000000
r2  0x40021008
r3  0x0000000c
r4  0x40000000
r5  0x00000000
r6  0x00000000
r7  0x20017fec
r8  0x00000000
r9  0x00000000
r10 0x00000000
r11 0x00000000  
r12 0x00000000

这表明所有寄存器都已成功保存在内存中.现在我执行下一条指令

this shows that all the registers are successfully saved in the memory. Now i step the next instruction

ldmia r0!, {r1-r12}

在此之后 这些是寄存器的内容:

after this these are the contents of registers:

r0  0x60000400
r1  0x00000000
r2  0x40021008
r3  0x0000000c
r4  0x40000000
r5  0x00000000
r6  0x00000000
r7  0x20017fec
r8  0x00000000
r9  0x555555d5
r10 0x00000000
r11 0x00000000
r12 0x00000000

您可以看到所有寄存器都已还原，除了r9奇怪地是它的值是从0x60000000而不是0x600003F0弹出"的.

as you can see all the registers are restored except r9 which oddly has its value "pop"ed from 0x60000000 instead of 0x600003F0.

任何想法都可能导致此问题.我正在使用Jlink写入Flash.

Any idea what could be causing this issue. I am using Jlink to write into flash.

P.S.将寄存器保存到片上SRAM而不是外部SRAM时不会发生此问题；

P.S. This issue doesn't occur when the registers are saved to onchip SRAM as opposed to external SRAM;

修改 如果说明

ldmia r0!, {r1-r12}

分为两部分，例如:

ldmia r0!, {r1-r6}
ldmia r0!, {r7-r12}

然后所有寄存器成功恢复

then all the registers are restored successfully

推荐答案

您需要阅读STM32L4xx6xx Silicon Limitations. FMC不支持第2.2.4节九个字或更多的读取突发访问". (DocID026121 Rev 4)可从ST获得.

You need to read the STM32L4xx6xx Silicon Limitations. Section 2.2.4 Read burst access of nine words or more is not supported by FMC. ( DocID026121 Rev 4 ) available from ST.

"对FMC的CPU读取突发访问等于或大于9个寄存器返回损坏的数据 从第9个单词开始.这些突发只能由Cortex®-M4CPU生成 而不是其他主机(即不是通过DMA). 当将堆栈重新映射到FMC的外部存储器上时，会发生此问题，并且 POP操作使用9个或更多寄存器执行. 当LDM/VLDM操作与9个或更多寄存器一起使用时，也会发生这种情况."

"CPU read burst access equal to or more than 9 registers to FMC returns corrupted data starting from the 9th read word. These bursts can only be generated by Cortex®-M4 CPU and not by the other masters (i.e not by DMA). This issue occurs when the stack is remapped on the external memory on the FMC and POP operations are performed with 9 or more registers. This also occurs when LDM/VLDM operations are used with 9 or more registers."

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