nasm的扩展乘法 [英] extended multiplication with nasm

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本文介绍了nasm的扩展乘法的处理方法,对大家解决问题具有一定的参考价值,需要的朋友们下面随着小编来一起学习吧!

问题描述

作为分配的一部分,我一直试图将两个32位数字相乘并将结果存储在64位位置.但是,我的结果不正确.请帮我弄清楚为什么

as part of an assignment i have been trying to multiply two 32 bit numbers and store the result in a 64bit place. However, my result is incorrect. please help me figure why

[org 0x0100]
jmp start
multiplicand:       dd 100122,0
multiplier:         dd 66015
result:             dd 0,0
start:
initialize:         mov cl,16

                    mov bl,1
checkbit:           test bl,[multiplier]
                    jz decrement

multiply:           mov ax, [multiplicand]
                    add [result],ax
                    mov ax, [multiplicand+2]
                    adc [result+2], ax
                    mov ax, [multiplicand+4]
                    adc [result+4], ax


decrement:          shl bl,1
                    shl [multiplicand],1
                    rcl [multiplicand+2],1
                    rcl [multiplicand+4],1
                    dec cl
                    jnz checkbit

                    mov ax, 0x4c00
                    int 0x21

在afd调试器中的答案是F6B3A6(在DEC中为16587802),而应该是189F5C9A6(在十二月中为6609553830).我已经通过调试器,但是无法找到任何错误的代码.

the answer in afd debugger is F6B3A6 (16587802 IN DEC) whereas it should be 189F5C9A6 (6609553830 in dec). I have gone through the debugger but am unable to find anything wrong with the code.

推荐答案

请参阅有关一些d'oh的注释:

See the comments for a few d'oh's:

[org 0x0100]
jmp start

multiplicand: dd 100122,0
multiplier:   dd 66015
result:       dd 0,0

start:
initialize:   mov cl,32 ; multipliers are 32-bit, so 32 iterations, not 16

              mov bl,1
checkbit:     test bl,[multiplier]
              jz decrement

multiply:     mov ax, [multiplicand]
              add [result],ax
              mov ax, [multiplicand+2]
              adc [result+2], ax
              mov ax, [multiplicand+4]
              adc [result+4], ax
              mov ax, [multiplicand+6] ; forgot this
              adc [result+6], ax       ; forgot this

decrement:    ; shl bl,1               ; bl is 8-bit, but you need to test 32
              shr word [multiplier+2],1 ; so, shift multiplier right instead
              rcr word [multiplier],1 ; of shifting bl left

              shl word [multiplicand],1 ; this is NASM, I'd rather tell
              rcl word [multiplicand+2],1 ; the operand size here
              rcl word [multiplicand+4],1 ; because it's unclear
              rcl word [multiplicand+6],1 ; forgot this
              dec cl
              jnz checkbit

              mov ax, 0x4c00
              int 0x21

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