x86-64规范地址? [英] x86-64 canonical address?

问题描述

在阅读英特尔手册时，我遇到以下问题:

During reading of an Intel manual book I came across the following:

在支持Intel 64体系结构的处理器上，IA32_SYSENTER_ESP字段和IA32_SYSENTER_EIP字段必须分别包含规范地址.

On processors that support Intel 64 architecture, the IA32_SYSENTER_ESP field and the IA32_SYSENTER_EIP field must each contain a canonical address.

什么是规范地址"?

推荐答案

我建议您下载

I suggest that you download the full software developer's manual. The documentation is available in separate volumes, but that link gives you all seven volumes in a single massive PDF, which makes it easier to search for things.

答案在第3.3.7.1节.该部分的第一行指出

The answer is in section 3.3.7.1. The first line of that section states

在64位模式下，如果将微体系结构的地址位63到最高有效位设置为全1或全0，则认为该地址为规范形式.

In 64-bit mode, an address is considered to be in canonical form if address bits 63 through to the most-significant implemented bit by the microarchitecture are set to either all ones or all zeros.

它从那里继续...

您可以使用cpuid来查询该CPU上支持的虚拟地址宽度. (即由微体系结构实现".)或者您通常可以假设48位.

You can use cpuid to query the supported virtual address width on that CPU. (i.e. "implemented by the microarchitecture".) Or you can normally just assume 48-bit.

即规范的虚拟地址是48位，正确地将其符号扩展为64.如果高位不匹配，则它是非规范的，如果尝试取消引用它，将会出错.

I.e. a canonical virtual address is 48 bits correctly sign-extended to 64. If the high bits don't match, it's non-canonical and will fault if you attempt to dereference it.

(或与Intel即将推出的5级页表扩展，将57位符号扩展为64位).

(Or with Intel's upcoming 5-level page table extension, 57 bits sign-extended to 64).

这篇关于x86-64规范地址?的文章就介绍到这了，希望我们推荐的答案对大家有所帮助，也希望大家多多支持IT屋！