程序计数器保存当前地址还是下一条指令的地址? [英] Does Program Counter hold current address or the address of the next instruction?

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问题描述

作为一个初学者和自学者,我正在学习汇编,并且目前正在阅读 该书的第3章,艾伦·霍尔卢布(Allen Hollub)的《 C伴侣》.我不明白 他在带有两个字节字的虚拟演示机中描述的程序计数器或PC的描述.这是第57页中PC的描述.

Being a beginner and self-learner, I am learning assembly and currently reading the chapter 3 of the book, The C Companion by Allen Hollub. I can't understand the description of Program Counter or PC he describes in an imaginary demo machine with two byte word. Here is the description of PC in page 57.

"PC始终保存正在执行的指令当前的地址. 当执行每条指令以保存地址时,它会自动更新 下一条要执行的指令. ... ... 这里的重要概念是PC保留 next 指令的地址,而不是指令本身. "

"The PC always holds the address of the instruction currently being executed. It is automatically updated as each instruction executed to hold the address of the next instruction to be executed. ... ... The important concept here is that the PC holds the address of the next instruction, not the instruction itself. "

我不明白保存当前地址和下一个指令的地址之间的区别. PC是否同时将两个地址保存为两个连续的字节?

I fail to understand the difference between holding the current address and the address of the next instruction. Does PC hold the two addresses in two consecutive bytes at the same time?

推荐答案

我无法理解他在虚构的演示机器中用两个字节字描述的程序计数器或PC的描述.

I can't understand the description of Program Counter or PC he describes in an imaginary demo machine with two byte word.

他正在描述一个简单的CPU,它解释了 CPU的总体工作方式.

He is describing a simple CPU which explains how CPUs work in general.

实际CPU 要复杂得多:

在许多手册(适用于任何类型的CPU)中,您都会看到类似以下语句:将PC寄存器压入堆栈."

In many manuals (for any kind of CPU) you'll find sentences like: "The PC register is pushed on the stack."

这通常意味着将从call指令返回后执行的指令的地址压入堆栈.

This typically means that the address of the instruction that is executed after returning from a call instruction is pushed on the stack.

但是这样的句子不是100%正确的:对于68k CPU(见下文),将写入下一条指令的地址,而不是当前指令的指令加2!

However such sentences are not 100% correct: In the case of a 68k CPU (see below) the address of the next instruction is written, not the instruction of the current instruction plus 2!

对于大多数CPU,相对于PC的jump指令是相对于下一条指令的地址而言的;但是有一些反例(例如PowerPC VLE).

For most CPUs PC-relative jump instructions are relative to the address of the next instruction; however there are counter-examples (such as PowerPC VLE).

32位x86 CPU (在大多数台式机/笔记本电脑中使用)

32-bit x86 CPUs (as used in most desktop / laptop computers)

在此类CPU上,只有call 直接读取EIP寄存器,并且只有跳转指令才能写入EIP.这足够绝缘",如果根本没有物理EIP寄存器,而您不一定知道其内容,则该寄存器就是CPU中的一些内部电路.

On such CPUs, only call directly reads the EIP register, and only jump instructions write EIP. This is enough "insulation" that this register is some internal circuit in the CPU, if there is a physical EIP register at all, and you don't necessarily know its content.

(您也可以将int指令(如int3int 0x80)也视为读取CS:EIP,因为它们必须推送异常帧.但是将它们视为触发异常更为有意义-搬运机械.

(You could count int instructions like int3 or int 0x80 as reading CS:EIP as well, because they have to push an exception frame. But it makes more sense to think of them as triggering the exception-handling machinery.

很有可能不同的x86 CPU的内部工作方式不同,因此EIP寄存器"的实际内容在不同的CPU中也不同. (而且,现代的高性能实现不会只有一个EIP寄存器,但是它们会做任何必要的操作来保留这种错觉并在需要时推送正确的返回地址.)

It is highly probable that different x86 CPUs work differently internally so the actual content of the EIP "register" is different in different CPUs. (And modern high-performance implementation won't have just one EIP register, but they do whatever is necessary to preserve the illusion and push the right return address when needed.)

(相对于PC的跳转相对于下一条指令的地址.)

(PC-relative jumps are relative to the address of the next instruction.)

64位x86 CPU

这些CPU的指令直接使用RIP寄存器,例如mov eax,[rip+symbol_offset]进行PC相对的静态数据加载;使共享库和ASLR的位置无关代码的效率明显高于32位x86.在这种情况下,"RIP"是下一条指令的地址.

These CPUs have instructions that directly use the RIP register, like mov eax,[rip+symbol_offset] to do a PC-relative load of static data; makes position-independent code for shared libraries and ASLR significantly more efficient than 32-bit x86. In this case "RIP" is the address of the next instruction.

68k

这些CPU还可以直接使用PC寄存器的内容.在这种情况下,PC会反映出当前指令的地址加2 (在此我不确定).

These CPUs also have a possibility to directly use the content of the PC register. In this case the PC reflects the address of the current instruction plus 2 (I'm not absolutely sure here).

因为这样的指令至少有4个字节长,所以PC寄存器的值将反映指令中"中间"字节的地址.

Because such instructions are at least 4 bytes long the value of the PC register will reflect the address of a byte "in the middle" of an instruction.

ARM

在ARM CPU上读取PC时(可以直接读取!),该值通常反映当前指令的地址加8 ,在某些情况下甚至会加上12!

When reading the PC on ARM CPUs (it can be read directly!) the value typically reflects the address of the current instruction plus 8, in some situations even plus 12!

(指令长4个字节,因此当前指令加8"表示:前面的 2 条指令的地址!)

(Instructions are 4 bytes long so "current instruction plus 8" means: The address of two instructions ahead!)

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