程序计数器和指令寄存器 [英] Program Counter and Instruction Register

问题描述

程序计数器保存下一条要执行的指令的地址，而指令寄存器保存要执行的实际指令。其中之一还不够吗？

Program counter holds the address of the instruction that should be executed next, while instruction register holds the actual instruction to be executed. wouldn't one of them be enough?

这些寄存器中每个寄存器的长度是多少？

And what is the length of each one of these registers?

谢谢。

推荐答案

您将始终需要两者。程序计数器（PC）保存要执行的下一条指令的地址，而指令寄存器（IR）保存编码的指令。提取指令后，程序计数器将增加一个地址值（到下一条指令的位置）。然后对指令进行解码和适当执行。

You will need both always. The program counter (PC) holds the address of the next instruction to be executed, while the instruction register (IR) holds the encoded instruction. Upon fetching the instruction, the program counter is incremented by one "address value" (to the location of the next instruction). The instruction is then decoded and executed appropriately.

同时需要这两个原因的原因是，如果您只有一个程序计数器并将其用于这两个目的，则会得到以下内容麻烦的系统：

The reason why you need both is because if you only had a program counter and used it for both purposes you would get the following troublesome system:

[程序执行开始]

1. PC包含0x00000000（例如，这是程序在内存中的起始地址。）


2. 从内存中获取已编码的指令，并将其放入PC中。


3. 该指令被解码并执行


4. 现在是时候转到下一条指令了，所以我们回到PC看看下一条指令的地址是什么。但是，我们有一个问题，因为PC的上一个地址已被删除，所以我们不知道下一条指令在哪里。

1. PC contains 0x00000000 (say this is start address of program in memory)
2. Encoded instruction is fetched from the memory and placed into PC.
3. The instruction is decoded and executed.
4. Now it is time to move onto the next instruction so we go back to the PC to see what the address of the next instruction is. However, we have a problem because PC's previous address was removed so we have no idea where the next instruction is.

因此，我们需要另一个寄存器，用于保存从内存中获取的实际指令。一旦获取了该内存，便增加了PC，以便我们知道从何处获取下一条指令。

Therefore, we need another register to hold the actual instruction fetched from memory. Once we fetch that memory, we increase PC so that we know where to fetch the next instruction.

P.S。寄存器的宽度取决于架构的字长。例如，对于32位处理器，字长为32位。因此，CPU上的寄存器为32位。指令寄存器的尺寸没有变化。区别在于行为和解释。指令以各种形式编码，但是它们仍然占用32位寄存器。例如，Altera的Nios II处理器包含3种不同的指令类型，每种指令的编码方式都不同。请参见 ftp://ftp.ftp.altera.com/up第6页/pub/Tutorials/DE2/Computer_Organization/tut_nios2_introduction.pdf

P.S. the width of the registers varies depending on the architecture's word size. For example, for a 32-bit processor, the word size is 32-bits. Therefore, the registers on the CPU would be 32 bits. Instruction registers are no different in dimensions. The difference is in the behavior and interpretation. Instructions are encoded in various forms, however, they still occupy a 32-bit register. For example, the Nios II processor from Altera contains 3 different instruction types, each encoded differently. See page 6 of ftp://ftp.altera.com/up/pub/Tutorials/DE2/Computer_Organization/tut_nios2_introduction.pdf

您也可以从上面的链接中进一步了解Nios II处理器的结构。这是一个简单的IP CPU。当然，英特尔具有自己的规格/设计，并且会有所不同。

You can learn more about the Nios II processor's structure from the link above as well. It is a simple IP CPU. Of course Intel has their own specification/design and it will vary.

这篇关于程序计数器和指令寄存器的文章就介绍到这了，希望我们推荐的答案对大家有所帮助，也希望大家多多支持IT屋！