为什么仍将1的补码用于矢量指令的编码? [英] Why is 1's complement still used for encoding vector instructions?

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问题描述

在回答中, jww 指出,1的补码仍用于对Intel体系结构和Ruslan进行矢量指令编码阐明了随着自动向量化变得越来越普遍,这些指令正在被更多地使用.

In an answer, jww points out that 1's complement is still used in encoding vector instructions on intel architectures, and Ruslan clarifies that these instructions are being used more as auto-vectorization becomes common.

1的补码是否具有使它继续在这些指令中使用的优势,还是仅仅出于历史原因?

Is there an advantage of 1's complement that causes it to continue to be used in these instructions, or is it simply being used for historical reasons?

引用jww:

来自英特尔® 64和IA-32体系结构软件开发人员手册 2A,第3-8页:

From Intel® 64 and IA-32 Architectures Software Developer’s Manual 2A, page 3-8:

3.1.1.8说明部分

3.1.1.8 Description Section

然后,每条指令均按信息部分的数量进行描述. 描述"部分详细说明了指令的用途和所需的操作数.

Each instruction is then described by number of information sections. The "Description" section describes the purpose of the instructions and required operands in more detail.

说明部分中可能使用的术语摘要:
*旧版SSE:指SSE,SSE2,SSE3,SSSE3,SSE4,AESNI,PCLMULQDQ以及任何将来引用XMM寄存器且没有VEX前缀编码的指令集. * VEX.vvvv. VEX位字段指定了源寄存器或目标寄存器(以1的补码形式).
* rm_field:ModR/M r/m字段和任何REX.B
的简写 * reg_field:ModR/M reg字段和任何REX.R

Summary of terms that may be used in the description section:
* Legacy SSE: Refers to SSE, SSE2, SSE3, SSSE3, SSE4, AESNI, PCLMULQDQ and any future instruction sets referencing XMM registers and encoded without a VEX prefix.
* VEX.vvvv. The VEX bitfield specifying a source or destination register (in 1’s complement form).
* rm_field: shorthand for the ModR/M r/m field and any REX.B
* reg_field: shorthand for the ModR/M reg field and any REX.R

推荐答案

该文章不是在谈论1的补数用于整数存储.甚至VEX编码的整数指令也将作用于2的补码整数.

That article isn't talking about 1's complement being used for integer storage. Even VEX-encoded integer instructions are going to act on 2's compliment integers.

所有1的恭维就是说,VEX指令中的编码寄存器ID需要具有用于翻转寄存器ID的普通位.该问题中的一些人推测这是为了防止与现有说明发生冲突,这对我来说很有意义.

All that 1's compliment is saying there is that an encoded register ID in a VEX instruction needs to have the normal bits used to ID the register flipped. Some in that question speculated this was to prevent clashes with existing instructions which makes plenty of sense to me.

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