aarch64;负载获取独占vs负载独占 [英] aarch64; Load-Acquire Exclusive vs Load Exclusive

问题描述

LDAXR &和有什么区别?AArch64指令集中的 LDXR 条指令?

What is the difference between LDAXR & LDXR instructions out of AArch64 instruction set?

从参考手册中看，它们看起来完全一样("acquire"一词除外):

From reference manual they looks totally the same (with exception of 'acquire' word):

LDAXR -加载获取专用寄存器:将字从基址寻址的存储器加载到Wt.将物理地址记录为独占访问.

LDAXR - Load-Acquire Exclusive Register: loads word from memory addressed by base to Wt. Records the physical address as an exclusive access.

LDXR -加载专用寄存器:将一个字从基址寻址的存储器加载到Wt.将物理地址记录为独占访问.

LDXR - Load Exclusive Register: loads a word from memory addressed by base to Wt. Records the physical address as an exclusive access.

谢谢

推荐答案

最简单的形式是 LDAEX == LDXR + DMB_SY .

In the simplest form, LDAEX == LDXR +DMB_SY.

这是我对LDAXR的描述:

This is the description which I find for LDAXR:

C6.2.104 LDAXR

Load-Acquire Exclusive Register从基数派生一个地址寄存器值，从内存中加载32位字或64位双字，并将其写入寄存器.内存访问是原子的.PE标志作为独占访问方式访问的物理地址.这独占访问标记由商店独占"指令检查.看同步和信号量，第B2-135页.该指令也具有如Load-Acquire中所述的内存排序语义，第B2-108页的Load-AcquirePC和Store-Release.有关信息有关内存访问的信息，请参阅第C1-157页的加载/存储寻址模式.

Load-Acquire Exclusive Register derives an address from a base register value, loads a 32-bit word or 64-bit doubleword from memory, and writes it to a register. The memory access is atomic. The PE marks the physical address being accessed as an exclusive access. This exclusive access mark is checked by Store Exclusive instructions. See Synchronization and semaphores on page B2-135. The instruction also has memory ordering semantics as described in Load-Acquire, Load-AcquirePC, and Store-Release on page B2-108. For information about memory accesses see Load/Store addressing modes on page C1-157.

来自 DDI0487 Da

ARMv8体系结构将获取​​和发布语义添加到排他性和排他性说明，使他们能够获取顺序获取和/或释放语义.排他性负载可以将指令指定为具有获取语义，并且可以指定Store-Exclusive指令进行发布语义.这些可以任意组合以允许原子由成功的独占负载"和独占存储"对创建的更新具有以下任何一项:

The ARMv8 architecture adds the acquire and release semantics to Load-Exclusive and Store-Exclusive instructions, which allows them to gain ordering acquire and/or release semantics. The Load-Exclusive instruction can be specified to have acquire semantics, and the Store-Exclusive instruction can be specified to have release semantics. These can be arbitrarily combined to allow the atomic update created by a successful Load-Exclusive and Store-Exclusive pair to have any of:

• 无排序语义(使用LDREX和STREX).

• No Ordering semantics (using LDREX and STREX).

仅获取语义(使用LDAEX和STREX).

Acquire only semantics (using LDAEX and STREX).

仅释放语义(使用LDREX和STLEX).

Release only semantics (using LDREX and STLEX).

顺序一致的语义(使用LDAEX和STLEX).

Sequentially consistent semantics (using LDAEX and STLEX).

也(B2.3.5)，

Load-Acquire指令的基本原理是介绍加载获取生成的内存访问之间的顺序指令和存储器访问按程序顺序显示Load-Acquire指令，以便由每个PE在一定程度上遵守Load-Acquire指令要求该PE必须先一致地观察访问在程序之后按程序顺序显示的内存访问量该PE遵守Load-Acquire指令，PE必须连贯地观察访问.

The basic principle of a Load-Acquire instruction is to introduce order between the memory access generated by the Load-Acquire instruction and the memory accesses appearing in program order after the Load-Acquire instruction, such that the memory access generated by the Load-Acquire instruction is Observed-by each PE, to the extent that that PE is required to observe the access coherently, before any of the memory accesses appearing in program order after the Load-Acquire instruction are Observed-by that PE, to the extent that the PE is required to observe the accesses coherently.

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