[ARM CortexA]间强排序和设备内存类型差异 [英] [ARM CortexA]Difference between Strongly-ordered and Device Memory Type

问题描述

我真的是一个新的启动器的Cortex A和我知道的ARM应用弱序内存模式，有三个相互排斥的存储器类型：

I am really a new starter to Cortex A and I am aware the ARM applies weakly-ordered memory model, and there are three mutually exclusive memory types:

• 强排序


• 设备


• 正常

我大致了解什么是正常的，什么强排序和设备的意思。但是之间的探源强有序和设备是混淆了我。

I roughly understand what Normal is for and what Strongly-ordered and Device mean. However the diffrence between strongly-ordered and device is confusing to me.

据了Cortex-A系列程序员指南，唯一的区别是：

According to the Cortex-A Series Programmer's Guide, the only difference is that:

一个写强烈下令，只有当它达到的写访问的外设或内存组件的内存就可以完成。

A write to Strongly-ordered memory can complete only when it reaches the peripheral or memory component accessed by the write.

到设备内存的写入被允许完成它达到的写访问的外设或内存组件之前。

A write to Device memory is permitted to complete before it reaches the peripheral or memory component accessed by the write.

我不太清楚什么这真正的育意蕴。我猜测，的访问与输入的存储顺序强烈排序或设备要连贯与程序员codeS（乱序不能访问）。但是，CPU将有可能执行下一条指令在访问内存，如果输入的设备，它会只是等待，直到访问是完整的，如果键入的强烈排序。

I am not quite sure about what the real implification of this. I am guessing that, the order of the access to the memory typed with Strongly-ordered or Device should be coherent with programmers' codes (no out-of-order access). But the CPU will potentially execute the next instruction while accessing the memory if typed Device, and it will simply wait untill the access to be complete if typed Strongly-ordered.

纠正我，如果我错了，请和告诉我什么是这样做的意思。

Correct me if I am wrong and please tell me what is the meaning of doing this.

先谢谢了。

推荐答案

要了解一个重要的一点是，内存类型具有的没有的guaranted的指令流的整体影响 - 它们只影响排序内存访问。 （它们可能对集成在与一个特定的互连的特定方法的特定处理器的特定效果 - 但可以从未由软件依赖）

One important bit to understand is that memory types have no guaranted effect on the instruction stream as a whole - they affect only the ordering of memory accesses. (They may have a specific effect on a specific processor integrated in a specific way with a specific interconnect - but that can never be relied on by software.)

要了解另一个重要的事情是，即使强排序内存仅提供与问候订货到访问同一外设的隐性担保。任何订货要求比这更严格的要求使用显式屏障指令。

Another important thing to understand is that even Strongly-ordered memory provides implicit guarantees of ordering only with regards to accesses to the same peripheral. Any ordering requirements more strict than that require use of explicit barrier instructions.

一个第三个重要的一点是，该发生由于存储器类型的任何隐含的存储器访问顺序不影响存取到其它存储器类型的排序。再次，如果你的应用有这样的相关性，显式屏障指令是必需的。

A third important point is that any implicit memory access ordering that takes place due to memory types does not affect the ordering of accesses to other memory types. Again, if your application has dependencies like this, explicit barrier instructions are required.

现在，在这样的背景 - 描述的装置和强有序存储器之间的差的一个简单的方法是，设备存储器访问可以缓冲 ​​- 在处理器本身，或在互连。不同之处在于一个缓冲访问可以它已经完成之前（或者甚至启动）在终点信号作为完整的处理器。
这在失去任何错误条件同步报告的成本提供更好的性能。

Now, against that background - a simpler way of describing the difference between Device and Strongly-ordered memory is that Device memory accesses can be buffered - in the processor itself or in the interconnect. The difference being that a buffered access can be signalled as complete to the processor before it has completed (or even initiated) at the end point. This provides better performance at the cost of losing the synchronous reporting of any error condition.

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